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Code Issues Releases Activity

tests and handler fixes

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This commit is contained in:
bird_egop
2025-04-18 12:49:10 +03:00
parent 4cb20cf741
commit cfef24f72d
16 changed files with 176 additions and 107 deletions
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28
X86Disassembler/X86/Handlers/FloatingPoint/LoadStore/FildInt64Handler.cs
View File

@ -54,39 +54,15 @@ public class FildInt64Handler : InstructionHandler
}
// Read the ModR/M byte
var (mod, reg, rm, rawMemoryOperand) = ModRMDecoder.ReadModRM();
var (mod, reg, rm, operand) = ModRMDecoder.ReadModRM64();
// Set the instruction type
instruction.Type = InstructionType.Fild;
// Create a 64-bit memory operand
Operand memoryOperand;
if (rawMemoryOperand is DirectMemoryOperand directMemory)
{
memoryOperand = OperandFactory.CreateDirectMemoryOperand(directMemory.Address, 64);
}
else if (rawMemoryOperand is BaseRegisterMemoryOperand baseMemory)
{
memoryOperand = OperandFactory.CreateBaseRegisterMemoryOperand(baseMemory.BaseRegister, 64);
}
else if (rawMemoryOperand is DisplacementMemoryOperand dispMemory)
{
memoryOperand = OperandFactory.CreateDisplacementMemoryOperand(dispMemory.BaseRegister, dispMemory.Displacement, 64);
}
else if (rawMemoryOperand is ScaledIndexMemoryOperand scaledMemory)
{
memoryOperand = OperandFactory.CreateScaledIndexMemoryOperand(scaledMemory.IndexRegister, scaledMemory.Scale, scaledMemory.BaseRegister, scaledMemory.Displacement, 64);
}
else
{
memoryOperand = rawMemoryOperand;
}
// Set the structured operands
instruction.StructuredOperands =
[
memoryOperand
operand
];
return true;

28
X86Disassembler/X86/Handlers/FloatingPoint/LoadStore/FistpInt64Handler.cs
View File

@ -54,39 +54,15 @@ public class FistpInt64Handler : InstructionHandler
}
// Read the ModR/M byte
var (mod, reg, rm, rawMemoryOperand) = ModRMDecoder.ReadModRM();
var (mod, reg, rm, operand) = ModRMDecoder.ReadModRM64();
// Set the instruction type
instruction.Type = InstructionType.Fistp;
// Create a 64-bit memory operand
Operand memoryOperand;
if (rawMemoryOperand is DirectMemoryOperand directMemory)
{
memoryOperand = OperandFactory.CreateDirectMemoryOperand(directMemory.Address, 64);
}
else if (rawMemoryOperand is BaseRegisterMemoryOperand baseMemory)
{
memoryOperand = OperandFactory.CreateBaseRegisterMemoryOperand(baseMemory.BaseRegister, 64);
}
else if (rawMemoryOperand is DisplacementMemoryOperand dispMemory)
{
memoryOperand = OperandFactory.CreateDisplacementMemoryOperand(dispMemory.BaseRegister, dispMemory.Displacement, 64);
}
else if (rawMemoryOperand is ScaledIndexMemoryOperand scaledMemory)
{
memoryOperand = OperandFactory.CreateScaledIndexMemoryOperand(scaledMemory.IndexRegister, scaledMemory.Scale, scaledMemory.BaseRegister, scaledMemory.Displacement, 64);
}
else
{
memoryOperand = rawMemoryOperand;
}
// Set the structured operands
instruction.StructuredOperands =
[
memoryOperand
operand
];
return true;

2
X86Disassembler/X86/Handlers/FloatingPoint/LoadStore/FldFloat64Handler.cs
View File

@ -52,7 +52,7 @@ public class FldFloat64Handler : InstructionHandler
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// Verify reg field is 0 (FLD)
if (reg != 0)

2
X86Disassembler/X86/Handlers/FloatingPoint/LoadStore/FstFloat64Handler.cs
View File

@ -52,7 +52,7 @@ public class FstFloat64Handler : InstructionHandler
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// Set the instruction type
instruction.Type = InstructionType.Fst;

2
X86Disassembler/X86/Handlers/FloatingPoint/LoadStore/FstpFloat64Handler.cs
View File

@ -52,7 +52,7 @@ public class FstpFloat64Handler : InstructionHandler
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// Set the instruction type
instruction.Type = InstructionType.Fstp;