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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-20 16:18:37 +03:00

Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes.

This commit is contained in:
bird_egop
2025-04-18 00:22:02 +03:00
parent ec56576116
commit d216c29315
62 changed files with 4985 additions and 376 deletions

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOM ST(i), ST(0) instruction (DC D0-D7)
/// </summary>
public class FcomRegisterHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcomRegisterHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcomRegisterHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOM ST(i), ST(0) is DC D0-D7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 2
return reg == 2 && mod == 3;
}
/// <summary>
/// Decodes a FCOM ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcom;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMI instruction (DB F0-F7)
/// </summary>
public class FcomiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcomiHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcomiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMI is DB F0-F7
if (opcode != 0xDB) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 7 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 7
return reg == 7 && mod == 3;
}
/// <summary>
/// Decodes a FCOMI instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcomi;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var srcOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMIP ST(0), ST(i) instruction (DF F0-F7)
/// </summary>
public class FcomipHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcomipHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcomipHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMIP ST(0), ST(i) is DF F0-F7
if (opcode != 0xDF) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 6
return reg == 6 && mod == 3;
}
/// <summary>
/// Decodes a FCOMIP ST(0), ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcomip;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var srcOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMP ST(i), ST(0) instruction (DC D8-DF)
/// </summary>
public class FcompRegisterHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcompRegisterHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcompRegisterHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMP ST(i), ST(0) is DC D8-DF
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 3
return reg == 3 && mod == 3;
}
/// <summary>
/// Decodes a FCOMP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcomp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMP ST(0) instruction (DE D3)
/// </summary>
public class FcompStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcompStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcompStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMP ST(0) is DE D3
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte is exactly D3 (reg = 2, rm = 3, mod = 3)
byte modRm = Decoder.PeakByte();
return modRm == 0xD3;
}
/// <summary>
/// Decodes a FCOMP ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcomp;
// Create the FPU register operand
var fpuRegisterOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
fpuRegisterOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMPP instruction (DE D9)
/// </summary>
public class FcomppHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcomppHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcomppHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMPP is DE D9
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte is exactly D9 (reg = 3, rm = 1, mod = 3)
byte modRm = Decoder.PeakByte();
return modRm == 0xD9;
}
/// <summary>
/// Decodes a FCOMPP instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fcompp;
// FCOMPP has no operands
instruction.StructuredOperands = [];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FICOM int16 instruction (DE /2)
/// </summary>
public class FicomInt16Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FicomInt16Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FicomInt16Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FICOM int16 is DE /2
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle memory operands (mod != 3) with reg = 2
return reg == 2 && mod != 3;
}
/// <summary>
/// Decodes a FICOM int16 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte, specifying that we're dealing with 16-bit operands
var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
// Set the instruction type
instruction.Type = InstructionType.Ficom;
// Set the structured operands
instruction.StructuredOperands =
[
memoryOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FICOMP int16 instruction (DE /3)
/// </summary>
public class FicompInt16Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FicompInt16Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FicompInt16Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FICOMP int16 is DE /3
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle memory operands (mod != 3) with reg = 3
return reg == 3 && mod != 3;
}
/// <summary>
/// Decodes a FICOMP int16 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte, specifying that we're dealing with 16-bit operands
var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
// Set the instruction type
instruction.Type = InstructionType.Ficomp;
// Set the structured operands
instruction.StructuredOperands =
[
memoryOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FUCOM ST(i) instruction (DD E0-E7)
/// </summary>
public class FucomHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FucomHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FucomHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FUCOM ST(i) is DD E0-E7
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 4 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 4
return reg == 4 && mod == 3;
}
/// <summary>
/// Decodes a FUCOM ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fucom;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operand
var fpuRegisterOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
fpuRegisterOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FUCOMI instruction (DB E8-EF)
/// </summary>
public class FucomiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FucomiHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FucomiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FUCOMI is DB E8-EF
if (opcode != 0xDB) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 6
return reg == 6 && mod == 3;
}
/// <summary>
/// Decodes a FUCOMI instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fucomi;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var srcOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FUCOMIP ST(0), ST(i) instruction (DF E8-EF)
/// </summary>
public class FucomipHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FucomipHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FucomipHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FUCOMIP ST(0), ST(i) is DF E8-EF
if (opcode != 0xDF) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 5
return reg == 5 && mod == 3;
}
/// <summary>
/// Decodes a FUCOMIP ST(0), ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fucomip;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var srcOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

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@ -0,0 +1,87 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FUCOMP ST(i) instruction (DD E8-EF)
/// </summary>
public class FucompHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FucompHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FucompHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FUCOMP ST(i) is DD E8-EF
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 5
return reg == 5 && mod == 3;
}
/// <summary>
/// Decodes a FUCOMP ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fucomp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operand
var fpuRegisterOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
fpuRegisterOperand
];
return true;
}
}