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float handlers

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This commit is contained in:
bird_egop 2025-04-18 02:37:19 +03:00
parent 18ecf31c46
commit e967c0e0c0
27 changed files with 646 additions and 776 deletions
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44
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddFloat32Handler.cs
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@ -31,11 +31,13 @@ public class FaddFloat32Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 0
// Check if the ModR/M byte has reg field = 0 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 0;
// Only handle memory operands (mod != 3) with reg = 0
return reg == 0 && mod != 3;
}
/// <summary>
@ -51,40 +53,20 @@ public class FaddFloat32Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 32-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FADD)
if (reg != 0)
{
return false;
}
// We've already verified reg field is 0 (FADD) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

40
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FaddFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 0
// Check if the ModR/M byte has reg field = 0 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 0;
// Only handle memory operands (mod != 3) with reg = 0
return reg == 0 && mod != 3;
}
/// <summary>
@ -54,37 +56,17 @@ public class FaddFloat64Handler : InstructionHandler
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// Verify reg field is 0 (FADD)
if (reg != 0)
{
return false;
}
// We've already verified reg field is 0 (FADD) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM64
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddStStiHandler.cs Normal file
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@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FADD ST, ST(i) instruction (D8 C0-C7)
/// </summary>
public class FaddStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FaddStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FaddStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FADD ST, ST(i) is D8 C0-C7
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle C0-C7
return secondOpcode is >= 0xC0 and <= 0xC7;
}
/// <summary>
/// Decodes a FADD ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC0);
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddStiStHandler.cs Normal file
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@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FADD ST(i), ST instruction (DC C0-C7)
/// </summary>
public class FaddStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FaddStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FaddStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FADD ST(i), ST is DC C0-C7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle C0-C7
return secondOpcode is >= 0xC0 and <= 0xC7;
}
/// <summary>
/// Decodes a FADD ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC0);
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// Create the FPU register operands
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
return true;
}
}

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddpHandler.cs
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@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FADDP ST(i), ST(0) instruction (DE C0-C7)
/// </summary>
public class FaddpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FaddpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FaddpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FADDP ST(i), ST(0) is DE C0-C7
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 0
return reg == 0 && mod == 3;
}
/// <summary>
/// Decodes a FADDP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Faddp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

38
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FdivFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 6
// Check if the ModR/M byte has reg field = 6 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 6;
// Only handle memory operands (mod != 3) with reg = 6
return reg == 6 && mod != 3;
}
/// <summary>
@ -51,34 +53,20 @@ public class FdivFloat64Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// We've already verified reg field is 6 (FDIV) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fdiv;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F0-DC F7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivStStiHandler.cs Normal file
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@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIV ST, ST(i) instruction (D8 F0-F7)
/// </summary>
public class FdivStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIV ST, ST(i) is D8 F0-F7
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle F0-F7
return secondOpcode is >= 0xF0 and <= 0xF7;
}
/// <summary>
/// Decodes a FDIV ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF0);
// Set the instruction type
instruction.Type = InstructionType.Fdiv;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

12
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivRegisterHandler.cs → X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivStiStHandler.cs
View File

@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIV ST(i), ST(0) instruction (DC F0-F7)
/// Handler for FDIV ST(i), ST instruction (DC F0-F7)
/// </summary>
public class FdivRegisterHandler : InstructionHandler
public class FdivStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivRegisterHandler class
/// Initializes a new instance of the FdivStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivRegisterHandler(InstructionDecoder decoder)
public FdivStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
@ -23,7 +23,7 @@ public class FdivRegisterHandler : InstructionHandler
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIV ST(i), ST(0) is DC F0-F7
// FDIV ST(i), ST is DC F0-F7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
@ -39,7 +39,7 @@ public class FdivRegisterHandler : InstructionHandler
}
/// <summary>
/// Decodes a FDIV ST(i), ST(0) instruction
/// Decodes a FDIV ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpHandler.cs
View File

@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVP ST(i), ST(0) instruction (DE F0-F7)
/// </summary>
public class FdivpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVP ST(i), ST(0) is DE F0-F7
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 6
return reg == 6 && mod == 3;
}
/// <summary>
/// Decodes a FDIVP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fdivp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

38
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FdivrFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 7
// Check if the ModR/M byte has reg field = 7 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 7;
// Only handle memory operands (mod != 3) with reg = 7
return reg == 7 && mod != 3;
}
/// <summary>
@ -51,34 +53,20 @@ public class FdivrFloat64Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// We've already verified reg field is 7 (FDIVR) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fdivr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F8-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrStStiHandler.cs Normal file
View File

@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVR ST, ST(i) instruction (D8 F8-FF)
/// </summary>
public class FdivrStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVR ST, ST(i) is D8 F8-FF
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle F8-FF
return secondOpcode is >= 0xF8 and <= 0xFF;
}
/// <summary>
/// Decodes a FDIVR ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF8);
// Set the instruction type
instruction.Type = InstructionType.Fdivr;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

12
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrRegisterHandler.cs → X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrStiStHandler.cs
View File

@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVR ST(i), ST(0) instruction (DC F8-FF)
/// Handler for FDIVR ST(i), ST instruction (DC F8-FF)
/// </summary>
public class FdivrRegisterHandler : InstructionHandler
public class FdivrStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrRegisterHandler class
/// Initializes a new instance of the FdivrStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrRegisterHandler(InstructionDecoder decoder)
public FdivrStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
@ -23,7 +23,7 @@ public class FdivrRegisterHandler : InstructionHandler
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVR ST(i), ST(0) is DC F8-FF
// FDIVR ST(i), ST is DC F8-FF
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
@ -39,7 +39,7 @@ public class FdivrRegisterHandler : InstructionHandler
}
/// <summary>
/// Decodes a FDIVR ST(i), ST(0) instruction
/// Decodes a FDIVR ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrpHandler.cs
View File

@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVRP ST(i), ST(0) instruction (DE F8-FF)
/// </summary>
public class FdivrpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVRP ST(i), ST(0) is DE F8-FF
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 7 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 7
return reg == 7 && mod == 3;
}
/// <summary>
/// Decodes a FDIVRP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fdivrp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

40
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulFloat32Handler.cs
View File

@ -31,11 +31,13 @@ public class FmulFloat32Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 1
// Check if the ModR/M byte has reg field = 1 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 1;
// Only handle memory operands (mod != 3) with reg = 1
return reg == 1 && mod != 3;
}
/// <summary>
@ -51,36 +53,20 @@ public class FmulFloat32Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 32-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// We've already verified reg field is 1 (FMUL) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fmul;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
// Set the structured operands
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

36
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FmulFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 1
// Check if the ModR/M byte has reg field = 1 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 1;
// Only handle memory operands (mod != 3) with reg = 1
return reg == 1 && mod != 3;
}
/// <summary>
@ -54,31 +56,17 @@ public class FmulFloat64Handler : InstructionHandler
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// We've already verified reg field is 1 (FMUL) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fmul;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM64
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulStStiHandler.cs Normal file
View File

@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FMUL ST, ST(i) instruction (D8 C8-CF)
/// </summary>
public class FmulStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FmulStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FmulStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FMUL ST, ST(i) is D8 C8-CF
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle C8-CF
return secondOpcode is >= 0xC8 and <= 0xCF;
}
/// <summary>
/// Decodes a FMUL ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC8);
// Set the instruction type
instruction.Type = InstructionType.Fmul;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

12
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulRegisterHandler.cs → X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulStiStHandler.cs
View File

@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FMUL ST(i), ST(0) instruction (DC C8-CF)
/// Handler for FMUL ST(i), ST instruction (DC C8-CF)
/// </summary>
public class FmulRegisterHandler : InstructionHandler
public class FmulStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FmulRegisterHandler class
/// Initializes a new instance of the FmulStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FmulRegisterHandler(InstructionDecoder decoder)
public FmulStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
@ -23,7 +23,7 @@ public class FmulRegisterHandler : InstructionHandler
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FMUL ST(i), ST(0) is DC C8-CF
// FMUL ST(i), ST is DC C8-CF
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
@ -39,7 +39,7 @@ public class FmulRegisterHandler : InstructionHandler
}
/// <summary>
/// Decodes a FMUL ST(i), ST(0) instruction
/// Decodes a FMUL ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulpHandler.cs
View File

@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FMULP ST(i), ST(0) instruction (DE C8-CF)
/// </summary>
public class FmulpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FmulpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FmulpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FMULP ST(i), ST(0) is DE C8-CF
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 1 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 1
return reg == 1 && mod == 3;
}
/// <summary>
/// Decodes a FMULP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fmulp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

38
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FsubFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 4
// Check if the ModR/M byte has reg field = 4 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 4;
// Only handle memory operands (mod != 3) with reg = 4
return reg == 4 && mod != 3;
}
/// <summary>
@ -51,34 +53,20 @@ public class FsubFloat64Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// We've already verified reg field is 4 (FSUB) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fsub;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E0-DC E7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStStiHandler.cs Normal file
View File

@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUB ST, ST(i) instruction (D8 E0-E7)
/// </summary>
public class FsubStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUB ST, ST(i) is D8 E0-E7
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle E0-E7
return secondOpcode is >= 0xE0 and <= 0xE7;
}
/// <summary>
/// Decodes a FSUB ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE0);
// Set the instruction type
instruction.Type = InstructionType.Fsub;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

12
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubRegisterHandler.cs → X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs
View File

@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUB ST(i), ST(0) instruction (DC E0-E7)
/// Handler for FSUB ST(i), ST instruction (DC E0-E7)
/// </summary>
public class FsubRegisterHandler : InstructionHandler
public class FsubStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubRegisterHandler class
/// Initializes a new instance of the FsubStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubRegisterHandler(InstructionDecoder decoder)
public FsubStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
@ -23,7 +23,7 @@ public class FsubRegisterHandler : InstructionHandler
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUB ST(i), ST(0) is DC E0-E7
// FSUB ST(i), ST is DC E0-E7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
@ -39,7 +39,7 @@ public class FsubRegisterHandler : InstructionHandler
}
/// <summary>
/// Decodes a FSUB ST(i), ST(0) instruction
/// Decodes a FSUB ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubpHandler.cs
View File

@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBP ST(i), ST(0) instruction (DE E0-E7)
/// </summary>
public class FsubpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBP ST(i), ST(0) is DE E0-E7
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 4 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 4
return reg == 4 && mod == 3;
}
/// <summary>
/// Decodes a FSUBP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fsubp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

38
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrFloat64Handler.cs
View File

@ -31,11 +31,13 @@ public class FsubrFloat64Handler : InstructionHandler
return false;
}
// Check if the ModR/M byte has reg field = 5
// Check if the ModR/M byte has reg field = 5 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
return reg == 5;
// Only handle memory operands (mod != 3) with reg = 5
return reg == 5 && mod != 3;
}
/// <summary>
@ -51,34 +53,20 @@ public class FsubrFloat64Handler : InstructionHandler
return false;
}
// Read the ModR/M byte using the specialized FPU method
// Read the ModR/M byte using the specialized FPU method for 64-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64();
// We've already verified reg field is 5 (FSUBR) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fsubr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E8-DC EF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
// Set the structured operands - the operand already has the correct size from ReadModRMFpu64
instruction.StructuredOperands =
[
rawOperand
];
return true;
}

73
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrStStiHandler.cs Normal file
View File

@ -0,0 +1,73 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBR ST, ST(i) instruction (D8 E8-EF)
/// </summary>
public class FsubrStStiHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrStStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrStStiHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBR ST, ST(i) is D8 E8-EF
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check second opcode byte
byte secondOpcode = Decoder.PeakByte();
// Only handle E8-EF
return secondOpcode is >= 0xE8 and <= 0xEF;
}
/// <summary>
/// Decodes a FSUBR ST, ST(i) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte and calculate ST(i) index
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE8);
// Set the instruction type
instruction.Type = InstructionType.Fsubr;
// Create the FPU register operands
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
return true;
}
}

12
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrRegisterHandler.cs → X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrStiStHandler.cs
View File

@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBR ST(i), ST(0) instruction (DC E8-EF)
/// Handler for FSUBR ST(i), ST instruction (DC E8-EF)
/// </summary>
public class FsubrRegisterHandler : InstructionHandler
public class FsubrStiStHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrRegisterHandler class
/// Initializes a new instance of the FsubrStiStHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrRegisterHandler(InstructionDecoder decoder)
public FsubrStiStHandler(InstructionDecoder decoder)
: base(decoder)
{
}
@ -23,7 +23,7 @@ public class FsubrRegisterHandler : InstructionHandler
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBR ST(i), ST(0) is DC E8-EF
// FSUBR ST(i), ST is DC E8-EF
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
@ -39,7 +39,7 @@ public class FsubrRegisterHandler : InstructionHandler
}
/// <summary>
/// Decodes a FSUBR ST(i), ST(0) instruction
/// Decodes a FSUBR ST(i), ST instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>

89
X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrpHandler.cs
View File

@ -1,89 +0,0 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBRP ST(i), ST(0) instruction (DE E8-EF)
/// </summary>
public class FsubrpHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrpHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrpHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBRP ST(i), ST(0) is DE E8-EF
if (opcode != 0xDE) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5 and mod = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle register operands (mod = 3) with reg = 5
return reg == 5 && mod == 3;
}
/// <summary>
/// Decodes a FSUBRP ST(i), ST(0) instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
// Set the instruction type
instruction.Type = InstructionType.Fsubrp;
// Map rm field to FPU register index
FpuRegisterIndex stIndex = rm switch
{
RegisterIndex.A => FpuRegisterIndex.ST0,
RegisterIndex.C => FpuRegisterIndex.ST1,
RegisterIndex.D => FpuRegisterIndex.ST2,
RegisterIndex.B => FpuRegisterIndex.ST3,
RegisterIndex.Sp => FpuRegisterIndex.ST4,
RegisterIndex.Bp => FpuRegisterIndex.ST5,
RegisterIndex.Si => FpuRegisterIndex.ST6,
RegisterIndex.Di => FpuRegisterIndex.ST7,
_ => FpuRegisterIndex.ST0 // Default case, should not happen
};
// Create the FPU register operands
var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
// Set the structured operands
instruction.StructuredOperands =
[
destOperand,
srcOperand
];
return true;
}
}

5
X86DisassemblerTests/InstructionTests/InstructionHandlerFactoryTests.cs
View File

@ -38,7 +38,10 @@ public class InstructionHandlerFactoryTests
foreach (var handlerType in handlerTypes)
{
Assert.Contains(handlers, x => x.GetType() == handlerType);
if (handlers.All(x => x.GetType() != handlerType))
{
Assert.Fail($"{handlerType.Name} not found");
}
}
var uniqueRegisteredHandlers = new HashSet<string>();