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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-19 16:08:02 +03:00
Commit Graph

17 Commits

Author SHA1 Message Date
439b6576b7 Added support for CMP r32, r/m32 (0x3B) and MOV r/m32, imm32 (0xC7) instructions with tests 2025-04-13 00:38:38 +03:00
70f2acd3d1 Added support for LEA instruction (opcode 0x8D) with tests 2025-04-13 00:34:03 +03:00
94a61a17a1 Added complete set of OR instruction handlers with tests 2025-04-13 00:26:13 +03:00
3ffaaf0057 Added support for OR r8, r/m8 instruction (opcode 0x0A) with tests 2025-04-13 00:23:11 +03:00
016e1ee54f Reorganized instruction handlers into more descriptive folders (ArithmeticImmediate and ArithmeticUnary) 2025-04-12 23:46:05 +03:00
3cc6d27e33 Split FloatingPointHandler into specialized handlers for each instruction type and fixed FLDCW instruction formatting 2025-04-12 23:33:40 +03:00
0cc03c2479 Added test for INT3 instruction handler 2025-04-12 22:16:12 +03:00
3ea408d088 Improved XCHG instruction test to be more flexible about operand order 2025-04-12 22:10:01 +03:00
d5bcd56774 Added tests for previously untested DataTransferHandler methods and fixed NOP instruction handling 2025-04-12 22:05:51 +03:00
759d28f9a7 Added comprehensive tests for instruction handlers 2025-04-12 22:00:15 +03:00
5ede2bd3c6 remove comments 2025-04-12 21:54:06 +03:00
a0e40c8a52 Fixed instruction handlers and tests for Group1, Group3, and XOR instructions 2025-04-12 21:48:41 +03:00
f107b8e763 Added comprehensive tests for various instruction handlers. Created test files for Jump, Return, XOR, Group1, Group3, and Call instructions. Fixed ConditionalJumpHandler test to use 'jz' instead of 'je' since they are equivalent in x86. 2025-04-12 21:38:47 +03:00
794b56c6b5 move handlers 2025-04-12 21:34:16 +03:00
6ed6a7bd00 Fixed floating point instruction handling. Removed redundant FNSTSW AX check from FloatingPointHandler and added dedicated test for FnstswHandler. 2025-04-12 21:27:17 +03:00
fe0b04f5a1 Fixed TEST instruction handlers and tests. Updated TestImmWithRm8Handler and TestImmWithRm32Handler to properly check opcode in CanHandle and validate reg field in Decode. Improved test cases to use InstructionDecoder directly. 2025-04-12 21:21:03 +03:00
bf5fcdd2ff Fixed ConditionalJumpHandler to correctly implement x86 architecture specifications 2025-04-12 21:09:41 +03:00