23 Commits

Author	SHA1	Message	Date
bird_egop	a9d4c39717	add misc handlers, cleanup and fixes	2025-04-17 20:47:51 +03:00
bird_egop	124493cd94	Fixes to tests and ModRM + SIB	2025-04-17 20:06:18 +03:00
bird_egop	7c0e6d7f3a	Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions	2025-04-17 18:39:34 +03:00
bird_egop	dd97a00c2b	Added 16-bit ADD handlers for r/m16, imm16 and r/m16, imm8 instructions	2025-04-17 01:43:45 +03:00
bird_egop	3fc0ebf1d5	Unified ADC accumulator handlers into a single handler	2025-04-17 01:34:08 +03:00
bird_egop	9445fb225f	fixes and removed unused code	2025-04-16 19:07:32 +03:00
bird_egop	6719cff2af	Test fixes	2025-04-16 18:30:17 +03:00
bird_egop	e06ea2beb3	Refactored register operands to separate 8-bit registers into dedicated Register8Operand class	2025-04-16 01:10:33 +03:00
bird_egop	4327464b98	add new add handlers	2025-04-15 23:54:37 +03:00
bird_egop	abe4d38d4b	more cleanup	2025-04-15 02:42:47 +03:00
bird_egop	3ea327064a	Fix x86 disassembler issues with direct memory addressing and immediate value formatting	2025-04-15 02:29:32 +03:00
bird_egop	685eeda03d	Updated instruction handlers to use Type and StructuredOperands instead of Mnemonic and Operands	2025-04-14 22:09:05 +03:00
bird_egop	99b93523a4	more refactoring	2025-04-14 01:08:14 +03:00
bird_egop	00547ed273	simplify reading logic	2025-04-13 23:22:30 +03:00
bird_egop	cf1e1acf71	Simplified instruction handlers for better maintainability and consistency. Fixed operand size handling in XOR handlers with 16-bit registers. Added support for 6-byte NOP variant. Fixed formatting of immediate values to maintain consistent output.	2025-04-13 23:15:11 +03:00
bird_egop	11a2cfada4	nice big refactor	2025-04-13 23:06:52 +03:00
bird_egop	565158d9bd	Fixed immediate value formatting in Group1 instruction handlers	2025-04-13 16:00:46 +03:00
bird_egop	e12f5b5bdf	Fixed instruction boundary detection for complex instruction sequences	2025-04-13 03:08:37 +03:00
bird_egop	d46d03ce65	Added AddEaxImmHandler for decoding ADD EAX, imm32 instruction (opcode 0x05)	2025-04-13 02:31:08 +03:00
bird_egop	28ba47bfab	add factory tests	2025-04-13 01:30:58 +03:00
bird_egop	c701fdb435	Added CmpAlImmHandler for CMP AL, imm8 instruction (0x3C) with tests	2025-04-13 01:30:42 +03:00
bird_egop	7d23af32fa	Added support for MOV r/m8, imm8 (0xC6) and ADD r/m32, r32 (0x01) instructions with tests	2025-04-13 00:50:23 +03:00
bird_egop	266fdfeee5	Added support for CALL r/m32 (0xFF /2) and ADD r32, r/m32 (0x03) instructions with tests	2025-04-13 00:45:53 +03:00