ParkanPlayground/X86DisassemblerTests/TestData/sub_tests.csv

1	# SUB instruction tests
2	# Format: RawBytes;Instructions
3	RawBytes;Instructions
4	# Register-to-register SUB (32-bit)
5	# Register-to-memory SUB (32-bit)
6	# Memory-to-register SUB (32-bit)
7	# Immediate-to-register SUB (32-bit immediate)
8	# Immediate-to-memory SUB (32-bit immediate)
9	# Small immediate SUB (8-bit immediate to 32-bit register)
10	# Sign-extended immediate SUB (8-bit immediate sign-extended to 32-bit)
11	# 8-bit register operations
12	# SUB r/m8, r8 (opcode 28)
13	# SUB r8, r/m8 (opcode 2A)
14	# SUB AL, imm8 (opcode 2C)
15	# SUB r/m8, imm8 (opcode 80 /5)
16	# 16-bit register operations with operand size prefix (0x66)
17	# Note: The disassembler currently outputs 32-bit register names even with 0x66 prefix
18	# SUB r/m16, r16 (opcode 29 with 0x66 prefix)
19	# SUB r16, r/m16 (opcode 2B with 0x66 prefix)
20	# SUB AX, imm16 (opcode 2D with 0x66 prefix)
21	# SUB r/m16, imm8 (opcode 83 /5 with 0x66 prefix and sign extension)
22	# Additional test cases for more complex addressing modes
23	# SUB with SIB byte addressing (Scale-Index-Base)
24	# SUB [eax+ecx*4], edx (opcode 29)
25	# SUB edx, [eax+ecx*4] (opcode 2B)
26	# SUB with displacement-only addressing
27	# SUB [0x12345678], eax (opcode 29)
28	# SUB with segment override prefixes
29	# SUB fs:[ebx+0x10], ecx (opcode 29 with FS override)
30	# SUB ecx, gs:[ebx+0x10] (opcode 2B with GS override)
31	# SUB with complex addressing mode: base + index + scale + displacement
32	# SUB [eax+ecx*4+0x12345678], edx (opcode 29)
33	# Edge cases for immediate values
34	# SUB eax, 0x0 (opcode 83 /5 with zero immediate)
35	# SUB al, 0xFF (opcode 2C with max 8-bit immediate)
36	# SUB eax, 0xFFFFFFFF (opcode 81 /5 with max 32-bit immediate)
37	# SUB with negative immediate value (sign-extended)