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67 lines
2.9 KiB
CSV
67 lines
2.9 KiB
CSV
# FCOM/FCOMP/FCOMPP instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# FCOM - Compare floating point values
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D8D0;[{ "Type": "Fcom", "Operands": ["ST(0)"] }]
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D8D1;[{ "Type": "Fcom", "Operands": ["ST(1)"] }]
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D8D2;[{ "Type": "Fcom", "Operands": ["ST(2)"] }]
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D8D3;[{ "Type": "Fcom", "Operands": ["ST(3)"] }]
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D8D4;[{ "Type": "Fcom", "Operands": ["ST(4)"] }]
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D8D5;[{ "Type": "Fcom", "Operands": ["ST(5)"] }]
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D8D6;[{ "Type": "Fcom", "Operands": ["ST(6)"] }]
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D8D7;[{ "Type": "Fcom", "Operands": ["ST(7)"] }]
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# Memory operands
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D8142510000000;[{ "Type": "Fcom", "Operands": ["dword ptr [0x10]"] }]
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DC142510000000;[{ "Type": "Fcom", "Operands": ["qword ptr [0x10]"] }]
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D810;[{ "Type": "Fcom", "Operands": ["dword ptr [eax]"] }]
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DC10;[{ "Type": "Fcom", "Operands": ["qword ptr [eax]"] }]
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# With segment override prefixes
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26D810;[{ "Type": "Fcom", "Operands": ["dword ptr es:[eax]"] }]
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2ED810;[{ "Type": "Fcom", "Operands": ["dword ptr cs:[eax]"] }]
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36D810;[{ "Type": "Fcom", "Operands": ["dword ptr ss:[eax]"] }]
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3ED810;[{ "Type": "Fcom", "Operands": ["dword ptr ds:[eax]"] }]
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64D810;[{ "Type": "Fcom", "Operands": ["dword ptr fs:[eax]"] }]
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65D810;[{ "Type": "Fcom", "Operands": ["dword ptr gs:[eax]"] }]
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# FCOMP - Compare floating point values and pop
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D8D8;[{ "Type": "Fcomp", "Operands": ["ST(0)"] }]
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D8D9;[{ "Type": "Fcomp", "Operands": ["ST(1)"] }]
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D8DA;[{ "Type": "Fcomp", "Operands": ["ST(2)"] }]
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D8DB;[{ "Type": "Fcomp", "Operands": ["ST(3)"] }]
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D8DC;[{ "Type": "Fcomp", "Operands": ["ST(4)"] }]
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D8DD;[{ "Type": "Fcomp", "Operands": ["ST(5)"] }]
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D8DE;[{ "Type": "Fcomp", "Operands": ["ST(6)"] }]
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D8DF;[{ "Type": "Fcomp", "Operands": ["ST(7)"] }]
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# Memory operands
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D81C2510000000;[{ "Type": "Fcomp", "Operands": ["dword ptr [0x10]"] }]
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DC1C2510000000;[{ "Type": "Fcomp", "Operands": ["qword ptr [0x10]"] }]
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D818;[{ "Type": "Fcomp", "Operands": ["dword ptr [eax]"] }]
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DC18;[{ "Type": "Fcomp", "Operands": ["qword ptr [eax]"] }]
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# FCOMPP - Compare floating point values and pop twice
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DED9;[{ "Type": "Fcompp", "Operands": [] }]
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# FCOMI - Compare floating point and set EFLAGS
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DBF0;[{ "Type": "Fcomi", "Operands": ["ST(0)"] }]
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DBF1;[{ "Type": "Fcomi", "Operands": ["ST(1)"] }]
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DBF2;[{ "Type": "Fcomi", "Operands": ["ST(2)"] }]
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DBF3;[{ "Type": "Fcomi", "Operands": ["ST(3)"] }]
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DBF4;[{ "Type": "Fcomi", "Operands": ["ST(4)"] }]
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DBF5;[{ "Type": "Fcomi", "Operands": ["ST(5)"] }]
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DBF6;[{ "Type": "Fcomi", "Operands": ["ST(6)"] }]
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DBF7;[{ "Type": "Fcomi", "Operands": ["ST(7)"] }]
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# FCOMIP - Compare floating point and set EFLAGS and pop
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DFF0;[{ "Type": "Fcomip", "Operands": ["ST(0)"] }]
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DFF1;[{ "Type": "Fcomip", "Operands": ["ST(1)"] }]
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DFF2;[{ "Type": "Fcomip", "Operands": ["ST(2)"] }]
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DFF3;[{ "Type": "Fcomip", "Operands": ["ST(3)"] }]
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DFF4;[{ "Type": "Fcomip", "Operands": ["ST(4)"] }]
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DFF5;[{ "Type": "Fcomip", "Operands": ["ST(5)"] }]
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DFF6;[{ "Type": "Fcomip", "Operands": ["ST(6)"] }]
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DFF7;[{ "Type": "Fcomip", "Operands": ["ST(7)"] }]
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