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README.md
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8
Makefile
8
Makefile
@ -1,11 +1,11 @@
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# compile options
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# you can enable ('1') or disable ('0') any/all of these you like
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# compile options (see Readme.md)
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# '0' = disable, 1 = enable
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ENABLE_SWD := 0
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ENABLE_AIRCOPY := 0
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ENABLE_FMRADIO := 0
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ENABLE_OVERLAY := 1
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ENABLE_UART := 1
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ENABLE_AIRCOPY := 0
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ENABLE_FMRADIO := 0
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ENABLE_NOAA := 0
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ENABLE_VOICE := 0
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ENABLE_ALARM := 0
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45
README.md
45
README.md
@ -1,42 +1,41 @@
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# Open reimplementation of the Quan Sheng UV K5 v2.1.27 firmware
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# Open reimplementation of the Quan Sheng UV-K5 v2.1.27 firmware
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This repository is a cloned and customized version of DualTachyon's open firmware found here ..
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https://github.com/DualTachyon/uv-k5-firmware
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Am amazing achievement if you ask me !
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A cool achievement if you ask me
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# User customization
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This version you can customize at compile time by making various changes to the makefile.
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You can edit those changes by (currently) editing the MakeFile, look for these lines at the top of the file ..
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You can customize the firmware by enabling/disabling various compile options.
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You'll find the options at the top of "makefile" ('0' = disable, '1' = enable) ..
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```
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ENABLE_SWD := 0 enable only if you're using the CPU's SWD port (debugging/programming)
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ENABLE_OVERLAY := 1 cpu FLASH stuff
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ENABLE_UART := 1 without this you can't configure the radio with your PC
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ENABLE_AIRCOPY := 0 easier to just type frequency in
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ENABLE_FMRADIO := 0 FM band 2 RX
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ENABLE_OVERLAY := 1
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ENABLE_UART := 1 without this you can't configure the radio with your PC
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ENABLE_NOAA := 0 NOAA channels
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ENABLE_VOICE := 0 strange voices
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ENABLE_NOAA := 0 Everything NOAA
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ENABLE_VOICE := 0 want to hear voices ?
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ENABLE_ALARM := 0 TX alarms
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ENABLE_BIG_FREQ := 0 big font for the frequencies
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ENABLE_KEEP_MEM_NAME := 1 maintain the channel name when (re)saving a memory channel
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ENABLE_CHAN_NAME_FREQ := 1 show the channel frequency below the channel name/number
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ENABLE_WIDE_RX := 1 enable the RX in the full 18MHz to 1300MHz (though frontend is not tuned for full range)
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ENABLE_TX_WHEN_AM := 0 allow TX when RX set to AM
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ENABLE_CTCSS_TAIL_PHASE_SHIFT := 1 use CTCSS tail phase shift rather than QS's 55Hz tone method
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ENABLE_MAIN_KEY_HOLD := 1 keys 0-9 can be held down to bypass having to press the F-key
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ENABLE_BOOT_BEEPS := 1 gives the user some audio feedback on the volume level knob position at boot-up
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ENABLE_COMPANDER := 1 compander menu option - not yet fully operational
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#ENABLE_SINGLE_VFO_CHAN := 1 not yet implemented
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#ENABLE_BAND_SCOPE := 1 not yet implemented
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ENABLE_WIDE_RX := 1 full 18MHz to 1300MHz for RX (though frontend is not tuned for full range)
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ENABLE_TX_WHEN_AM := 0 allow TX (always FM) when RX is set to AM
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ENABLE_CTCSS_TAIL_PHASE_SHIFT := 1 use standard CTCSS tail phase shift rather than QS's own 55Hz tone method
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ENABLE_MAIN_KEY_HOLD := 1 keys 0-9 can be held down to bypass having to first press the F-key
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ENABLE_BOOT_BEEPS := 1 give user audio feedback on the volume knob position at boot-up
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ENABLE_COMPANDER := 1 compander option - not yet fully operational
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#ENABLE_SINGLE_VFO_CHAN := 1 not yet implemented - single VFO on display when possible
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#ENABLE_BAND_SCOPE := 1 not yet implemented - spectrum/pan-adapter
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```
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To enable the custom option, set the above option to '1'
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# Some other changes made
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* Various original QS firmware bugs fixed
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* Various QS firmware bugs fixed
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* Added new bugs
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* Finer RSSI bar steps
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* Nicer/cleaner big numeric font than original QS big numeric font
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@ -67,7 +66,7 @@ To compile directly in windows without the need of a linux virtual machine:
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```
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Then you can run 'win_make.bat' from the directory you saved this source code too.
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You may need to edit the bat file (path to make.exe) depending on where you installed 'gnu_make' too.
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You may need to edit the bat file (path to make.exe) depending on where you installed the above two packages too.
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# Credits
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@ -102,3 +101,9 @@ You may obtain a copy of the License at
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See the License for the specific language governing permissions and
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limitations under the License.
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# Example changes
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<p float="left">
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<img src="/chan_freq_option.png" width="300" />
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<img src="/F-CALI_menu.png" width="300" />
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</p>
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@ -31,4 +31,3 @@ uint32_t FLASH_ReadNvrWord(uint32_t Address)
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{
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return overlay_FLASH_ReadNvrWord(Address);
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}
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@ -21,9 +21,9 @@
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#include "sram-overlay.h"
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static volatile uint32_t *pFlash = 0;
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uint32_t overlay_FLASH_MainClock;
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uint32_t overlay_FLASH_ClockMultiplier;
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uint32_t overlay_0x20000478; // Nothing is using this???
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uint32_t overlay_FLASH_MainClock;
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uint32_t overlay_FLASH_ClockMultiplier;
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uint32_t overlay_0x20000478; // Nothing is using this???
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void overlay_FLASH_RebootToBootloader(void)
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{
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@ -94,16 +94,14 @@ uint32_t overlay_FLASH_ReadByAPB(uint32_t Offset)
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{
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uint32_t Data;
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while (overlay_FLASH_IsBusy()) {
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}
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while (overlay_FLASH_IsBusy()) {}
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overlay_FLASH_SetMode(FLASH_MODE_READ_APB);
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FLASH_ADDR = Offset >> 2;
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overlay_FLASH_Start();
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while (overlay_FLASH_IsBusy()) {
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}
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while (overlay_FLASH_IsBusy()) {}
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Data = FLASH_RDATA;
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@ -120,11 +118,11 @@ void overlay_FLASH_SetArea(FLASH_AREA Area)
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void overlay_FLASH_SetReadMode(FLASH_READ_MODE Mode)
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{
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if (Mode == FLASH_READ_MODE_1_CYCLE) {
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if (Mode == FLASH_READ_MODE_1_CYCLE)
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FLASH_CFG = (FLASH_CFG & ~FLASH_CFG_READ_MD_MASK) | FLASH_CFG_READ_MD_BITS_1_CYCLE;
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} else if (Mode == FLASH_READ_MODE_2_CYCLE) {
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else
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if (Mode == FLASH_READ_MODE_2_CYCLE)
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FLASH_CFG = (FLASH_CFG & ~FLASH_CFG_READ_MD_MASK) | FLASH_CFG_READ_MD_BITS_2_CYCLE;
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}
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}
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void overlay_FLASH_SetEraseTime(void)
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@ -135,8 +133,7 @@ void overlay_FLASH_SetEraseTime(void)
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void overlay_FLASH_WakeFromDeepSleep(void)
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{
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FLASH_CFG = (FLASH_CFG & ~FLASH_CFG_DEEP_PD_MASK) | FLASH_CFG_DEEP_PD_BITS_NORMAL;
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while (!overlay_FLASH_IsInitComplete()) {
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}
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while (!overlay_FLASH_IsInitComplete()) {}
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}
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void overlay_FLASH_SetMode(FLASH_MODE Mode)
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@ -153,28 +150,20 @@ void overlay_SystemReset(void)
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{
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// Lifted from core_cm0.h to preserve function order in the object file.
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__DSB(); /* Ensure all outstanding memory accesses included
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buffered write are completed before reset */
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SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
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SCB_AIRCR_SYSRESETREQ_Msk);
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__DSB(); /* Ensure completion of memory access */
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__DSB(); // Ensure all outstanding memory accesses included buffered write are completed before reset
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SCB->AIRCR = (0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | SCB_AIRCR_SYSRESETREQ_Msk;
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__DSB(); // Ensure completion of memory access
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for(;;) /* wait until reset */
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{
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for (;;) // wait until reset
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__NOP();
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}
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}
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uint32_t overlay_FLASH_ReadNvrWord(uint32_t Offset)
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{
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uint32_t Data;
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overlay_FLASH_SetArea(FLASH_AREA_NVR);
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Data = overlay_FLASH_ReadByAHB(Offset);
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overlay_FLASH_SetArea(FLASH_AREA_MAIN);
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return Data;
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}
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SYSCON_CHIP_ID2 = overlay_FLASH_ReadByAPB(0xF020);
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SYSCON_CHIP_ID3 = overlay_FLASH_ReadByAPB(0xF024);
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SYSCON_RC_FREQ_DELTA = overlay_FLASH_ReadByAHB(0x07C8);
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SYSCON_RC_FREQ_DELTA = overlay_FLASH_ReadByAHB(0x07C8);
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SYSCON_VREF_VOLT_DELTA = overlay_FLASH_ReadByAHB(0x07C4);
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PMU_TRIM_POW0 = overlay_FLASH_ReadByAHB(0x07E4);
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PMU_TRIM_POW1 = overlay_FLASH_ReadByAHB(0x07E0);
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PMU_TRIM_RCHF = overlay_FLASH_ReadByAHB(0x07D8);
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PMU_TRIM_RCLF = overlay_FLASH_ReadByAHB(0x07D4);
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PMU_TRIM_OPA = overlay_FLASH_ReadByAHB(0x07D0);
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PMU_TRIM_PLL = overlay_FLASH_ReadByAHB(0x07CC);
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PMU_TRIM_OPA = overlay_FLASH_ReadByAHB(0x07D0);
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PMU_TRIM_PLL = overlay_FLASH_ReadByAHB(0x07CC);
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overlay_0x20000478 = overlay_FLASH_ReadByAHB(0x07B8);
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Data = overlay_FLASH_ReadByAHB(0x07BC);
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Data = overlay_FLASH_ReadByAHB(0x07BC);
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SYSCON_DEV_CLK_GATE = (SYSCON_DEV_CLK_GATE & ~SYSCON_DEV_CLK_GATE_SARADC_MASK) | SYSCON_DEV_CLK_GATE_SARADC_BITS_ENABLE;
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SARADC_CALIB_OFFSET = ((Data & 0xFFFF) << SARADC_CALIB_OFFSET_OFFSET_SHIFT) & SARADC_CALIB_OFFSET_OFFSET_MASK;
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SARADC_CALIB_KD = (((Data >> 16) & 0xFFFF) << SARADC_CALIB_KD_KD_SHIFT) & SARADC_CALIB_KD_KD_MASK;
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SARADC_CALIB_KD = (((Data >> 16) & 0xFFFF) << SARADC_CALIB_KD_KD_SHIFT) & SARADC_CALIB_KD_KD_MASK;
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overlay_FLASH_SetArea(FLASH_AREA_MAIN);
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}
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