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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-20 00:18:02 +03:00
Commit Graph

40 Commits

Author SHA1 Message Date
2c85192d13 Fixed byte order handling in SUB instruction handlers and updated tests
Implemented SUB r32, r/m32 instruction handlers and tests

Added comprehensive tests for Push/Pop, Xchg, Sub instructions and enhanced segment override tests
2025-04-13 14:36:49 +03:00
44c73321ea move handlers to respective folders 2025-04-13 04:13:44 +03:00
e8a16e7ecd Moved AND instruction handlers from ArithmeticImmediate to dedicated And namespace for better organization 2025-04-13 04:11:06 +03:00
af94b88868 Added comprehensive test coverage for arithmetic and logical instructions. Implemented AND instruction handlers and added tests for ADC, SBB, and arithmetic unary operations. 2025-04-13 04:07:37 +03:00
b215908d76 fixups 2025-04-13 03:56:39 +03:00
611dce32e5 Fixed operand order in MOV instructions and updated tests to match disassembler output 2025-04-13 03:56:09 +03:00
b2929c38e9 Replaced all Assert.Contains with strict Assert.Equal in tests for better validation 2025-04-13 03:38:50 +03:00
0d271abdcb Replaced Assert.Contains with strict Assert.Equal in tests for better validation 2025-04-13 03:33:51 +03:00
e12f5b5bdf Fixed instruction boundary detection for complex instruction sequences 2025-04-13 03:08:37 +03:00
465056dd9a Fixed instruction boundary detection for the specific sequence at address 0x00001874 2025-04-13 02:51:51 +03:00
618ee641a8 Added OrRm8R8Handler for decoding OR r/m8, r8 instruction (opcode 0x08) 2025-04-13 02:35:48 +03:00
d46d03ce65 Added AddEaxImmHandler for decoding ADD EAX, imm32 instruction (opcode 0x05) 2025-04-13 02:31:08 +03:00
d0667950f8 Added proper REPNE prefix handling and comprehensive string instruction tests 2025-04-13 02:26:49 +03:00
c14a92bf04 Added support for string instructions with REP prefix, specifically F3 A5 (REP MOVS) 2025-04-13 02:10:48 +03:00
bfaeba0d5f Fixed segment override prefix handling for 0x64 (FS) opcode with tests 2025-04-13 01:39:38 +03:00
52841237c1 Added CmpRm32R32Handler for CMP r/m32, r32 instruction (0x39) with tests 2025-04-13 01:34:56 +03:00
28ba47bfab add factory tests 2025-04-13 01:30:58 +03:00
c701fdb435 Added CmpAlImmHandler for CMP AL, imm8 instruction (0x3C) with tests 2025-04-13 01:30:42 +03:00
9cad5ff95c fixup 2025-04-13 01:11:45 +03:00
402cdc68fb Added support for INC r32 instructions (0x40-0x47) with tests 2025-04-13 00:55:20 +03:00
7d23af32fa Added support for MOV r/m8, imm8 (0xC6) and ADD r/m32, r32 (0x01) instructions with tests 2025-04-13 00:50:23 +03:00
266fdfeee5 Added support for CALL r/m32 (0xFF /2) and ADD r32, r/m32 (0x03) instructions with tests 2025-04-13 00:45:53 +03:00
393aac5bf6 Added support for DEC r32 instructions (0x48-0x4F) with tests 2025-04-13 00:41:36 +03:00
439b6576b7 Added support for CMP r32, r/m32 (0x3B) and MOV r/m32, imm32 (0xC7) instructions with tests 2025-04-13 00:38:38 +03:00
70f2acd3d1 Added support for LEA instruction (opcode 0x8D) with tests 2025-04-13 00:34:03 +03:00
94a61a17a1 Added complete set of OR instruction handlers with tests 2025-04-13 00:26:13 +03:00
3ffaaf0057 Added support for OR r8, r/m8 instruction (opcode 0x0A) with tests 2025-04-13 00:23:11 +03:00
016e1ee54f Reorganized instruction handlers into more descriptive folders (ArithmeticImmediate and ArithmeticUnary) 2025-04-12 23:46:05 +03:00
3cc6d27e33 Split FloatingPointHandler into specialized handlers for each instruction type and fixed FLDCW instruction formatting 2025-04-12 23:33:40 +03:00
0cc03c2479 Added test for INT3 instruction handler 2025-04-12 22:16:12 +03:00
3ea408d088 Improved XCHG instruction test to be more flexible about operand order 2025-04-12 22:10:01 +03:00
d5bcd56774 Added tests for previously untested DataTransferHandler methods and fixed NOP instruction handling 2025-04-12 22:05:51 +03:00
759d28f9a7 Added comprehensive tests for instruction handlers 2025-04-12 22:00:15 +03:00
5ede2bd3c6 remove comments 2025-04-12 21:54:06 +03:00
a0e40c8a52 Fixed instruction handlers and tests for Group1, Group3, and XOR instructions 2025-04-12 21:48:41 +03:00
f107b8e763 Added comprehensive tests for various instruction handlers. Created test files for Jump, Return, XOR, Group1, Group3, and Call instructions. Fixed ConditionalJumpHandler test to use 'jz' instead of 'je' since they are equivalent in x86. 2025-04-12 21:38:47 +03:00
794b56c6b5 move handlers 2025-04-12 21:34:16 +03:00
6ed6a7bd00 Fixed floating point instruction handling. Removed redundant FNSTSW AX check from FloatingPointHandler and added dedicated test for FnstswHandler. 2025-04-12 21:27:17 +03:00
fe0b04f5a1 Fixed TEST instruction handlers and tests. Updated TestImmWithRm8Handler and TestImmWithRm32Handler to properly check opcode in CanHandle and validate reg field in Decode. Improved test cases to use InstructionDecoder directly. 2025-04-12 21:21:03 +03:00
bf5fcdd2ff Fixed ConditionalJumpHandler to correctly implement x86 architecture specifications 2025-04-12 21:09:41 +03:00