13 Commits

Author	SHA1	Message	Date
bird_egop	3ffaaf0057	Added support for OR r8, r/m8 instruction (opcode 0x0A) with tests	2025-04-13 00:23:11 +03:00
bird_egop	016e1ee54f	Reorganized instruction handlers into more descriptive folders (ArithmeticImmediate and ArithmeticUnary)	2025-04-12 23:46:05 +03:00
bird_egop	f658f4384c	cleanup	2025-04-12 23:40:48 +03:00
bird_egop	82653f96f2	split float handlers	2025-04-12 23:24:42 +03:00
bird_egop	acccf5169a	Fixed FnstswHandler test by registering the handler in InstructionHandlerFactory	2025-04-12 22:34:02 +03:00
bird_egop	c027adc113	split and move handlers	2025-04-12 22:18:46 +03:00
bird_egop	0cc03c2479	Added test for INT3 instruction handler	2025-04-12 22:16:12 +03:00
bird_egop	a0e40c8a52	Fixed instruction handlers and tests for Group1, Group3, and XOR instructions	2025-04-12 21:48:41 +03:00
bird_egop	794b56c6b5	move handlers	2025-04-12 21:34:16 +03:00
bird_egop	6ed6a7bd00	Fixed floating point instruction handling. Removed redundant FNSTSW AX check from FloatingPointHandler and added dedicated test for FnstswHandler.	2025-04-12 21:27:17 +03:00
bird_egop	87e0c152e2	Fixed disassembler regression by adding handlers for TEST r/m8, r8 and TEST r/m8, imm8 instructions	2025-04-12 20:32:38 +03:00
bird_egop	e4b8645da0	Implemented individual handlers for Group1 and Group3 instructions	2025-04-12 20:13:01 +03:00
bird_egop	58a148ebd8	Refactor instruction handlers to use single instruction per handler pattern	2025-04-12 19:57:42 +03:00