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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-19 11:51:17 +03:00

30 Commits

Author SHA1 Message Date
bird_egop
618ee641a8 Added OrRm8R8Handler for decoding OR r/m8, r8 instruction (opcode 0x08) 2025-04-13 02:35:48 +03:00
bird_egop
d46d03ce65 Added AddEaxImmHandler for decoding ADD EAX, imm32 instruction (opcode 0x05) 2025-04-13 02:31:08 +03:00
bird_egop
79bf419c07 Consolidated string instruction handling by enhancing StringInstructionHandler to handle both regular and REP/REPNE prefixed instructions 2025-04-13 02:23:27 +03:00
bird_egop
410211fcc6 Converted StringInstructionDecoder to StringInstructionHandler for better consistency with handler pattern 2025-04-13 02:18:12 +03:00
bird_egop
9dfa559045 Refactored instruction decoder to improve modularity. Created StringInstructionDecoder and updated PrefixDecoder. Fixed handler registration in InstructionHandlerFactory. 2025-04-13 02:16:12 +03:00
bird_egop
52841237c1 Added CmpRm32R32Handler for CMP r/m32, r32 instruction (0x39) with tests 2025-04-13 01:34:56 +03:00
bird_egop
c701fdb435 Added CmpAlImmHandler for CMP AL, imm8 instruction (0x3C) with tests 2025-04-13 01:30:42 +03:00
bird_egop
8123ced2d6 Removed duplicate OR instruction handlers and files to fix handler organization 2025-04-13 01:11:20 +03:00
bird_egop
03aa51d13c Removed Group1 folder and fixed handler organization. Organized handlers by instruction type instead of abstract groupings. 2025-04-13 01:08:49 +03:00
bird_egop
402cdc68fb Added support for INC r32 instructions (0x40-0x47) with tests 2025-04-13 00:55:20 +03:00
bird_egop
7d23af32fa Added support for MOV r/m8, imm8 (0xC6) and ADD r/m32, r32 (0x01) instructions with tests 2025-04-13 00:50:23 +03:00
bird_egop
266fdfeee5 Added support for CALL r/m32 (0xFF /2) and ADD r32, r/m32 (0x03) instructions with tests 2025-04-13 00:45:53 +03:00
bird_egop
393aac5bf6 Added support for DEC r32 instructions (0x48-0x4F) with tests 2025-04-13 00:41:36 +03:00
bird_egop
439b6576b7 Added support for CMP r32, r/m32 (0x3B) and MOV r/m32, imm32 (0xC7) instructions with tests 2025-04-13 00:38:38 +03:00
bird_egop
70f2acd3d1 Added support for LEA instruction (opcode 0x8D) with tests 2025-04-13 00:34:03 +03:00
bird_egop
79bb19df6b Reorganized OR instruction handlers into a dedicated folder 2025-04-13 00:28:20 +03:00
bird_egop
94a61a17a1 Added complete set of OR instruction handlers with tests 2025-04-13 00:26:13 +03:00
bird_egop
3ffaaf0057 Added support for OR r8, r/m8 instruction (opcode 0x0A) with tests 2025-04-13 00:23:11 +03:00
bird_egop
016e1ee54f Reorganized instruction handlers into more descriptive folders (ArithmeticImmediate and ArithmeticUnary) 2025-04-12 23:46:05 +03:00
bird_egop
f658f4384c cleanup 2025-04-12 23:40:48 +03:00
bird_egop
82653f96f2 split float handlers 2025-04-12 23:24:42 +03:00
bird_egop
acccf5169a Fixed FnstswHandler test by registering the handler in InstructionHandlerFactory 2025-04-12 22:34:02 +03:00
bird_egop
c027adc113 split and move handlers 2025-04-12 22:18:46 +03:00
bird_egop
0cc03c2479 Added test for INT3 instruction handler 2025-04-12 22:16:12 +03:00
bird_egop
a0e40c8a52 Fixed instruction handlers and tests for Group1, Group3, and XOR instructions 2025-04-12 21:48:41 +03:00
bird_egop
794b56c6b5 move handlers 2025-04-12 21:34:16 +03:00
bird_egop
6ed6a7bd00 Fixed floating point instruction handling. Removed redundant FNSTSW AX check from FloatingPointHandler and added dedicated test for FnstswHandler. 2025-04-12 21:27:17 +03:00
bird_egop
87e0c152e2 Fixed disassembler regression by adding handlers for TEST r/m8, r8 and TEST r/m8, imm8 instructions 2025-04-12 20:32:38 +03:00
bird_egop
e4b8645da0 Implemented individual handlers for Group1 and Group3 instructions 2025-04-12 20:13:01 +03:00
bird_egop
58a148ebd8 Refactor instruction handlers to use single instruction per handler pattern 2025-04-12 19:57:42 +03:00