115 Commits

Author	SHA1	Message	Date
bird_egop	6ed6a7bd00	Fixed floating point instruction handling. Removed redundant FNSTSW AX check from FloatingPointHandler and added dedicated test for FnstswHandler.	2025-04-12 21:27:17 +03:00
bird_egop	fe0b04f5a1	Fixed TEST instruction handlers and tests. Updated TestImmWithRm8Handler and TestImmWithRm32Handler to properly check opcode in CanHandle and validate reg field in Decode. Improved test cases to use InstructionDecoder directly.	2025-04-12 21:21:03 +03:00
bird_egop	bf5fcdd2ff	Fixed ConditionalJumpHandler to correctly implement x86 architecture specifications	2025-04-12 21:09:41 +03:00
bird_egop	bd251b6c06	Improved ConditionalJumpHandler with better documentation and clearer code	2025-04-12 21:02:52 +03:00
bird_egop	0925bb7fef	Fixed ConditionalJumpHandler to correctly display jump offset and added X86DisassemblerTests project to solution	2025-04-12 21:00:32 +03:00
bird_egop	87e0c152e2	Fixed disassembler regression by adding handlers for TEST r/m8, r8 and TEST r/m8, imm8 instructions	2025-04-12 20:32:38 +03:00
bird_egop	dbc9b42007	Removed obsolete handler classes and restored InstructionHandlerFactory	2025-04-12 20:25:29 +03:00
bird_egop	1442fd7060	Removed obsolete Group1Handler and Group3Handler classes	2025-04-12 20:14:28 +03:00
bird_egop	e4b8645da0	Implemented individual handlers for Group1 and Group3 instructions	2025-04-12 20:13:01 +03:00
bird_egop	58a148ebd8	Refactor instruction handlers to use single instruction per handler pattern	2025-04-12 19:57:42 +03:00
bird_egop	0fb3fd7311	Add support for XOR instruction	2025-04-12 19:35:25 +03:00
bird_egop	f3aa862a57	Add support for two-byte conditional jumps, including JNZ (0F 85)	2025-04-12 19:30:13 +03:00
bird_egop	cedd7a931e	Add support for TEST instruction	2025-04-12 19:26:00 +03:00
bird_egop	ae1c4730d0	Add support for FNSTSW instruction	2025-04-12 19:21:32 +03:00
bird_egop	dffc405c10	Refactored instruction decoder into smaller, more maintainable components using handler pattern	2025-04-12 19:18:52 +03:00