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e5b63270b6
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Added detailed comments explaining x86 ModR/M special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement
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2025-04-16 19:54:15 +03:00 |
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154e811d2d
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Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4)
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2025-04-16 19:50:00 +03:00 |
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db96af74ff
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Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types
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2025-04-16 19:43:03 +03:00 |
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9445fb225f
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fixes and removed unused code
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2025-04-16 19:07:32 +03:00 |
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46592d4877
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fix various tests
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2025-04-15 23:54:51 +03:00 |
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0dac4481f6
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fix segment override tests according to ghidra
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2025-04-15 23:22:14 +03:00 |
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61e92a50a5
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Split FPU tests by instruction type for better organization and readability
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2025-04-15 22:45:46 +03:00 |
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0a2d551cb4
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Enhanced test coverage for floating-point instructions
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2025-04-15 22:40:09 +03:00 |
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904f0eed47
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Enhanced test coverage for DIV, flag control, and FNSTSW instructions
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2025-04-15 22:35:14 +03:00 |
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6169d68967
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Enhanced test coverage for CMP, BIT and CALL instructions
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2025-04-15 22:32:37 +03:00 |
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d6903f2e5b
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Enhanced test coverage for AND instructions
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2025-04-15 22:28:54 +03:00 |
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2fde1f2ae3
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Enhanced test coverage for ADC and ADD instructions
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2025-04-15 22:27:51 +03:00 |
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2123ed2c5d
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add tons of tests
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2025-04-15 22:20:46 +03:00 |
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3ea327064a
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Fix x86 disassembler issues with direct memory addressing and immediate value formatting
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2025-04-15 02:29:32 +03:00 |
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11a2cfada4
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nice big refactor
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2025-04-13 23:06:52 +03:00 |
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89b2b32cd6
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fix xor AX, 16bit imm
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2025-04-13 19:55:13 +03:00 |
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56c12b552c
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Fixed XOR instruction handlers for consistent immediate value handling
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2025-04-13 19:26:08 +03:00 |
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e91a0223f7
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Refactor SUB handlers
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2025-04-13 18:22:44 +03:00 |
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8cf26060f2
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Implemented NOP instruction handlers for multi-byte NOP variants
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2025-04-13 18:00:26 +03:00 |
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032030169e
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Added comprehensive test cases for SUB instructions with complex addressing modes
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2025-04-13 17:55:29 +03:00 |
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b11b39ac4e
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Implemented 16-bit SUB instruction handlers and fixed test data
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2025-04-13 17:51:54 +03:00 |
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d1d52af511
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Added CSV test files for various instruction types and enabled comments in CSV files
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2025-04-13 17:17:28 +03:00 |
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2cdd9f1e83
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move tests to csv
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2025-04-13 17:02:46 +03:00 |
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