 bird_egop
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84d5652a62
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remove duplicate registration
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2025-04-18 01:02:14 +03:00 |
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bird_egop
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66f9e838ad
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Fixed floating point handlers for qword operands and added missing FCOM ST(0), ST(i) handler
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2025-04-18 00:44:57 +03:00 |
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bird_egop
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e6e3e886c8
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Removed original floating point handlers that have been replaced by specialized handlers
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2025-04-18 00:23:21 +03:00 |
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bird_egop
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d216c29315
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Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes.
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2025-04-18 00:22:02 +03:00 |
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bird_egop
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ec56576116
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Refactored floating point handlers into specialized classes for better organization and maintainability
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2025-04-17 23:57:16 +03:00 |
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bird_egop
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5916d13995
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Reorganize floating point handlers into logical subfolders
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2025-04-17 23:48:09 +03:00 |
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bird_egop
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963248dca0
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Refactor floating point handlers to use ReadModRMFpu method
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2025-04-17 23:33:56 +03:00 |
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bird_egop
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df453b930f
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fixes
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2025-04-17 22:56:05 +03:00 |
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bird_egop
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4d2db05a07
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Implemented additional SBB instruction handlers for register-register and register-memory operations
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2025-04-17 22:04:12 +03:00 |
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bird_egop
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33dc0b0fa2
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Implemented SBB instruction handlers for the x86 disassembler
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2025-04-17 21:49:44 +03:00 |
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bird_egop
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a62812f71c
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implement shift and rotate handlers. Fix tests
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2025-04-17 21:35:49 +03:00 |
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bird_egop
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a9d4c39717
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add misc handlers, cleanup and fixes
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2025-04-17 20:47:51 +03:00 |
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bird_egop
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124493cd94
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Fixes to tests and ModRM + SIB
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2025-04-17 20:06:18 +03:00 |
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bird_egop
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7c0e6d7f3a
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Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions
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2025-04-17 18:39:34 +03:00 |
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bird_egop
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dd97a00c2b
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Added 16-bit ADD handlers for r/m16, imm16 and r/m16, imm8 instructions
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2025-04-17 01:43:45 +03:00 |
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bird_egop
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3fc0ebf1d5
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Unified ADC accumulator handlers into a single handler
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2025-04-17 01:34:08 +03:00 |
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bird_egop
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8c9b34ef09
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Fixed PushImm16Handler registration order to correctly handle PUSH imm16 with operand size prefix
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2025-04-16 21:46:08 +03:00 |
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bird_egop
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fa1a7f582c
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Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv
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2025-04-16 21:44:02 +03:00 |
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bird_egop
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089fe4dfd4
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Removed duplicate AndImmWithRm32Handler file
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2025-04-16 21:27:23 +03:00 |
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bird_egop
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b210764caa
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Removed duplicate AND handler and added detailed opcode comments to XOR handlers. Fixed potential naming inconsistencies in handler registrations.
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2025-04-16 21:25:46 +03:00 |
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bird_egop
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e8955b1ebd
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Improved code documentation in InstructionHandlerFactory. Added detailed opcode comments to handler registration lines and fixed duplicate handler registrations in RegisterAllHandlers method.
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2025-04-16 21:24:09 +03:00 |
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bird_egop
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9096267f73
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Added OrRm32R32Handler for OR r/m32, r32 (opcode 09) instruction and registered it in InstructionHandlerFactory. This fixes failing OR instruction tests.
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2025-04-16 21:20:40 +03:00 |
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bird_egop
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eac8e9ea69
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Fixed NOT instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax] and displacement addressing.
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2025-04-16 21:17:48 +03:00 |
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bird_egop
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226ec25549
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Fixed DIV and IDIV instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax], [ebp], and displacement addressing.
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2025-04-16 21:16:31 +03:00 |
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bird_egop
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9da33e12c4
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Fixed IMUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing.
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2025-04-16 21:11:47 +03:00 |
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bird_egop
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800915b534
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new handlers and test fixes
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2025-04-16 20:54:08 +03:00 |
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bird_egop
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f654f64c71
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Created dedicated Mul namespace for MUL instruction handlers. Implemented MulRm8Handler for MUL r/m8 instruction (opcode F6 /4) and moved MulRm32Handler to the new namespace. Updated InstructionHandlerFactory to register both handlers.
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2025-04-16 20:43:06 +03:00 |
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bird_egop
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be2dfc3dc5
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Fixed MUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] and direct memory addressing.
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2025-04-16 20:40:18 +03:00 |
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bird_egop
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72ad1c0d90
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Fixed NEG instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing.
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2025-04-16 20:37:46 +03:00 |
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bird_egop
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d2279f4720
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Added NegRm8Handler for NEG r/m8 instruction (opcode F6 /3). Registered the new handler in InstructionHandlerFactory.
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2025-04-16 20:29:26 +03:00 |
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bird_egop
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f702e9da84
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Fixed special case in MOV tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement.
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2025-04-16 20:27:00 +03:00 |
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bird_egop
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41a4e5884d
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Fixed special case in INC/DEC tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement.
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2025-04-16 20:18:14 +03:00 |
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bird_egop
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58b739d922
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Fixed special case in LEA test with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test case with Mod=01 and zero displacement.
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2025-04-16 20:16:31 +03:00 |
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bird_egop
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a474c4b7e4
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Fixed invalid test cases in x86 disassembler tests. Added comments explaining special cases in x86 encoding and added valid test cases for LEA with different destination registers.
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2025-04-16 20:13:07 +03:00 |
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bird_egop
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09786b781b
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Added detailed comments to test files explaining x86 encoding special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement, 3) SIB byte with EBP as base register special cases
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2025-04-16 19:58:34 +03:00 |
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bird_egop
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e5b63270b6
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Added detailed comments explaining x86 ModR/M special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement
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2025-04-16 19:54:15 +03:00 |
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bird_egop
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154e811d2d
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Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4)
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2025-04-16 19:50:00 +03:00 |
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bird_egop
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bc6d32a725
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Fixed JP and JNP instruction types in TwoByteConditionalJumpHandler
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2025-04-16 19:44:37 +03:00 |
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bird_egop
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db96af74ff
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Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types
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2025-04-16 19:43:03 +03:00 |
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bird_egop
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193f9cd2d8
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refactor modrm decoder more
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2025-04-16 19:14:11 +03:00 |
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bird_egop
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a91d6af8fc
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Refactored ModRMDecoder class into smaller, more focused components. Created RegisterMapper and SIBDecoder classes to improve maintainability.
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2025-04-16 19:11:36 +03:00 |
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bird_egop
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9445fb225f
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fixes and removed unused code
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2025-04-16 19:07:32 +03:00 |
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bird_egop
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9ddaa02471
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Fixed ModRM handling for 8-bit operands with SIB byte. Updated test to match implementation.
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2025-04-16 18:42:15 +03:00 |
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bird_egop
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deb98183b1
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more fixes
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2025-04-16 18:32:41 +03:00 |
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bird_egop
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6719cff2af
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Test fixes
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2025-04-16 18:30:17 +03:00 |
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bird_egop
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d4eb920e2f
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Updated instruction handlers to use factory methods instead of directly setting Size property
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2025-04-16 01:39:23 +03:00 |
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bird_egop
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e06ea2beb3
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Refactored register operands to separate 8-bit registers into dedicated Register8Operand class
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2025-04-16 01:10:33 +03:00 |
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bird_egop
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46592d4877
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fix various tests
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2025-04-15 23:54:51 +03:00 |
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bird_egop
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4327464b98
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add new add handlers
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2025-04-15 23:54:37 +03:00 |
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bird_egop
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0dac4481f6
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fix segment override tests according to ghidra
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2025-04-15 23:22:14 +03:00 |
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bird_egop
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6882f0bd86
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Update TestDataProvider to use CSV files directly from filesystem instead of embedded resources
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2025-04-15 23:21:52 +03:00 |
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bird_egop
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61e92a50a5
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Split FPU tests by instruction type for better organization and readability
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2025-04-15 22:45:46 +03:00 |
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bird_egop
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0a2d551cb4
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Enhanced test coverage for floating-point instructions
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2025-04-15 22:40:09 +03:00 |
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bird_egop
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904f0eed47
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Enhanced test coverage for DIV, flag control, and FNSTSW instructions
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2025-04-15 22:35:14 +03:00 |
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bird_egop
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6169d68967
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Enhanced test coverage for CMP, BIT and CALL instructions
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2025-04-15 22:32:37 +03:00 |
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bird_egop
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d6903f2e5b
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Enhanced test coverage for AND instructions
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2025-04-15 22:28:54 +03:00 |
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bird_egop
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2fde1f2ae3
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Enhanced test coverage for ADC and ADD instructions
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2025-04-15 22:27:51 +03:00 |
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bird_egop
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2123ed2c5d
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add tons of tests
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2025-04-15 22:20:46 +03:00 |
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bird_egop
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abe4d38d4b
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more cleanup
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2025-04-15 02:42:47 +03:00 |
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bird_egop
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49f1d7d221
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cleanup
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2025-04-15 02:32:14 +03:00 |
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bird_egop
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3ea327064a
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Fix x86 disassembler issues with direct memory addressing and immediate value formatting
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2025-04-15 02:29:32 +03:00 |
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bird_egop
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d351f41808
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Fixed x86 disassembler issues: 1) Corrected ModRMDecoder to use RegisterIndex.Sp instead of RegisterIndex.Si for SIB detection 2) Updated floating point instruction handlers to use proper instruction types 3) Enhanced ImmediateOperand.ToString() to show full 32-bit representation for sign-extended values
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2025-04-15 00:14:28 +03:00 |
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bird_egop
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9117830ff1
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unbreak tests
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2025-04-14 23:08:52 +03:00 |
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bird_egop
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685eeda03d
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Updated instruction handlers to use Type and StructuredOperands instead of Mnemonic and Operands
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2025-04-14 22:09:05 +03:00 |
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bird_egop
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c516e063e7
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basic decompiler and fixes
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2025-04-14 02:07:17 +03:00 |
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bird_egop
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157171fa90
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remove more special cases. use standardized api
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2025-04-14 01:52:33 +03:00 |
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bird_egop
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c9e854a663
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remove direct position changes from modrmdecoder
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2025-04-14 01:15:26 +03:00 |
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bird_egop
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99b93523a4
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more refactoring
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2025-04-14 01:08:14 +03:00 |
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bird_egop
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f54dc10596
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Simplified XorImmWithRm16Handler by improving boundary checking and removing redundant code
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2025-04-14 01:01:31 +03:00 |
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bird_egop
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4567465570
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Simplified TestRegMemHandler by improving boundary checking and removing redundant code
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2025-04-14 00:56:57 +03:00 |
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bird_egop
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d3d2c4c63f
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Simplified TestRegMem8Handler by removing unused variables and improving code structure
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2025-04-14 00:54:16 +03:00 |
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bird_egop
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b7c6092b7f
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Simplified TEST instruction handlers by removing special cases and improving code structure
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2025-04-14 00:53:16 +03:00 |
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bird_egop
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dae52fc3ec
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Simplified SubImmFromRm32SignExtendedHandler by removing special case for operand type-based formatting
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2025-04-14 00:41:58 +03:00 |
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bird_egop
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5b09d6f9b8
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Simplified SubImmFromRm16SignExtendedHandler by removing special case for register name conversion
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2025-04-14 00:39:58 +03:00 |
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bird_egop
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689195c6e5
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Simplified SubImmFromRm16Handler by removing special case for register name conversion and improving boundary checking
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2025-04-14 00:38:47 +03:00 |
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bird_egop
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e134452eda
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Improved PUSH handlers by moving reg field check to CanHandle and adding proper boundary checking
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2025-04-14 00:33:39 +03:00 |
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bird_egop
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53696a9f1c
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Removed special case check for 0x83 in OrRm8R8Handler to avoid introducing special cases in general solutions
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2025-04-14 00:30:53 +03:00 |
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bird_egop
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243789892d
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Further simplified MultiByteNopHandler by using an array of tuples and matching patterns from longest to shortest
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2025-04-14 00:23:58 +03:00 |
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bird_egop
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4b549f4b1b
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Simplified MultiByteNopHandler by using a dictionary-based approach to replace complex conditional logic
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2025-04-14 00:21:24 +03:00 |
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bird_egop
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c9901aa9b8
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Simplified MovRm32Imm32Handler by improving boundary checking and error handling, and updated test to match expected behavior
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2025-04-14 00:19:36 +03:00 |
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bird_egop
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2d0f701dd1
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Simplified TwoByteConditionalJumpHandler and MovRegMemHandler by improving boundary checking and target address calculation
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2025-04-14 00:17:31 +03:00 |
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bird_egop
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996be18172
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Simplified JmpRel32Handler by improving target address calculation and code organization
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2025-04-14 00:11:55 +03:00 |
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bird_egop
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38770de005
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Simplified jump instruction handlers by using consistent decoder methods and improving code organization
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2025-04-14 00:09:44 +03:00 |
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bird_egop
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5daab494e1
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Simplified LoadStoreInt32Handler by replacing if-else logic with a dictionary-based approach
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2025-04-14 00:00:30 +03:00 |
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bird_egop
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fac1339fec
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Simplified LoadStoreInt16Handler by replacing complex logic with a dictionary-based approach and improving memory operand handling
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2025-04-13 23:53:27 +03:00 |
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bird_egop
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4e837f5c63
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Simplified LoadStoreFloat64Handler by replacing if-else logic with a dictionary-based approach
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2025-04-13 23:52:00 +03:00 |
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bird_egop
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b531db77d5
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Simplified LoadStoreControlHandler by replacing complex switch statements with a dictionary-based approach
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2025-04-13 23:50:23 +03:00 |
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bird_egop
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0ff20494e1
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Simplified Int32OperationHandler by replacing complex if-else logic with a dictionary-based approach
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2025-04-13 23:48:45 +03:00 |
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bird_egop
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46a4696481
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Simplified Int16OperationHandler by replacing complex if-else logic with a dictionary-based approach
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2025-04-13 23:47:10 +03:00 |
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bird_egop
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7ab388f26d
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Simplified FnstswHandler by using CanReadByte for boundary checking and improving code readability
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2025-04-13 23:45:26 +03:00 |
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bird_egop
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ec1aa4a124
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Simplified CmpImmWithRm8Handler by removing unnecessary raw bytes handling and improving operand formatting
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2025-04-13 23:41:30 +03:00 |
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bird_egop
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ec70b31058
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Simplified CmpImmWithRm32Handler and added AndImmWithRm32Handler
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2025-04-13 23:39:57 +03:00 |
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bird_egop
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8d1522b6cb
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Added XML documentation comments to buffer reading methods in InstructionDecoder
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2025-04-13 23:36:53 +03:00 |
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bird_egop
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6827cb735e
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Simplified StringInstructionHandler by combining mnemonic and operands into a single dictionary and removing redundant switch statement
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2025-04-13 23:24:14 +03:00 |
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bird_egop
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00547ed273
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simplify reading logic
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2025-04-13 23:22:30 +03:00 |
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bird_egop
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0ea3294c61
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Simplified AndImmToRm32SignExtendedHandler for better maintainability and consistency
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2025-04-13 23:18:38 +03:00 |
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bird_egop
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f19f2254fe
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Simplified AndImmToRm8Handler for better maintainability and consistency
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2025-04-13 23:16:34 +03:00 |
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bird_egop
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cf1e1acf71
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Simplified instruction handlers for better maintainability and consistency. Fixed operand size handling in XOR handlers with 16-bit registers. Added support for 6-byte NOP variant. Fixed formatting of immediate values to maintain consistent output.
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2025-04-13 23:15:11 +03:00 |
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bird_egop
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11a2cfada4
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nice big refactor
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2025-04-13 23:06:52 +03:00 |
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bird_egop
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59df064ca4
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broken tests
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2025-04-13 20:20:51 +03:00 |
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