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Code Issues Activity

Commit Graph

  • a8536f938d fxid master bird_egop 2025-12-09 02:32:32 +03:00
  • fcfb8d0e8a feat: Add landscape mesh support to MshConverter bird_egop 2025-12-05 18:04:50 +03:00
  • 4951550420 add better tooltips bird_egop 2025-12-04 07:58:32 +03:00
  • 5ea0cb143f add help bird_egop 2025-12-04 03:55:41 +03:00
  • 75b1548f55 Material parsing and viewing bird_egop 2025-12-04 03:50:29 +03:00
  • 3b1fd5ef97 more docs bird_egop 2025-12-01 12:48:08 +03:00
  • 60fd173c47 info about lightmap texture naming bird_egop 2025-12-01 07:41:42 +03:00
  • 3c9b46cbca update docs bird_egop 2025-11-30 18:27:40 +03:00
  • c9d0366637 Improvements on docs, based on decompilation bird_egop 2025-11-30 18:11:16 +03:00
  • 6c9e1d0b98 some findings bird_egop 2025-11-27 19:01:41 +03:00
  • 3738881c46 drop unused projects bird_egop 2025-11-23 19:33:58 +03:00
  • c27b77cbfc parse PAL file bird_egop 2025-11-23 00:04:05 +03:00
  • f4442897a6 improve binary varset parsing bird_egop 2025-11-22 09:02:35 +03:00
  • 2a78bbebda parse binary varset file bird_egop 2025-11-22 06:53:07 +03:00
  • a774db37a6 improvements bird_egop 2025-10-05 18:17:18 +03:00
  • c1ea70efe0 Create LICENSE windows-release-05-10-25 Bird Egop 2025-09-06 02:25:15 +03:00
  • be60d8d72f Examples and fixes windows-release bird_egop 2025-09-04 03:13:46 +03:00
  • f2bed4b141 Allow to view cp .dat in UI bird_egop 2025-09-04 02:45:26 +03:00
  • 7f0246f996 update docs on wea. correctly parse msh bird_egop 2025-09-03 01:30:54 +03:00
  • 055694a4b4 Hack .msh bird_egop 2025-08-31 01:07:24 +03:00
  • fca052365f add docs bird_egop 2025-08-27 04:03:50 +03:00
  • 5c52ab2b2b msh and cp converters. Mesh broken. bird_egop 2025-08-26 04:29:30 +03:00
  • 77e7f7652c update documentation bird_egop 2025-08-26 04:21:48 +03:00
  • 35af4da326 read msh 0A file bird_egop 2025-08-23 19:03:03 +03:00
  • 4b1c4bf3aa update readme bird_egop 2025-08-23 03:26:04 +03:00
  • 4ea756a1a4 Update readme bird_egop 2025-08-23 03:21:03 +03:00
  • b9e15541c5 Parse cp .dat files. Object schemes. Test parsing of .msh bird_egop 2025-08-23 03:00:14 +03:00
  • 67c9020b96 Update README.md Bird Egop 2025-08-20 15:38:44 +03:00
  • 476017e9c1 upgrade to net9 bird_egop 2025-08-18 22:05:17 +03:00
  • ee77738713 remove leftovers bird_egop 2025-08-18 21:57:18 +03:00
  • 8e31f43abf Update README.md Bird Egop 2025-08-18 21:09:31 +03:00
  • e137deff7e implement NRES packing x86-disassembler bird_egop 2025-06-22 18:47:21 +03:00
  • c044db1b96 refactorings bird_egop 2025-04-20 19:54:52 +03:00
  • 1c7054781c changes all over the place bird_egop 2025-04-19 02:12:46 +03:00
  • de2e4312fb decompiler iter1 bird_egop 2025-04-18 23:46:51 +03:00
  • 0ddbfd2951 Enhance control flow analysis and pseudocode generation bird_egop 2025-04-18 21:52:48 +03:00
  • 883f3a2659 Improve decompiler output and reduce verbosity bird_egop 2025-04-18 21:42:25 +03:00
  • c7fd962d90 Fix address conversion in BlockDisassembler to properly handle RVA addresses and ensure entry blocks are correctly identified bird_egop 2025-04-18 21:34:35 +03:00
  • 7eead316cd t bird_egop 2025-04-18 16:29:53 +03:00
  • 23fb497e0a Remove debug output from Disassembler for cleaner output bird_egop 2025-04-18 14:20:15 +03:00
  • 54a0a3e9c0 Fix RVA to offset calculation for control flow-based disassembly bird_egop 2025-04-18 14:19:13 +03:00
  • 8c15143933 Fix all tests bird_egop 2025-04-18 14:06:43 +03:00
  • d089fc9b28 fixes to FPU tests bird_egop 2025-04-18 13:47:34 +03:00
  • 8567cf1d6d Fix floating-point instruction memory operand test encodings bird_egop 2025-04-18 13:47:22 +03:00
  • 1536ce4385 Fix FSUB/FSUBR and FSUBP/FSUBRP instruction type handling bird_egop 2025-04-18 13:41:42 +03:00
  • 7bb14523e5 Fix FsubrStiStHandler to correctly use FSUB instruction type for DC E8-EF opcodes bird_egop 2025-04-18 13:31:23 +03:00
  • d25e7e8133 Fix FSTSW/FNSTSW memory operand encodings in test data bird_egop 2025-04-18 13:28:19 +03:00
  • 3cdd1fb2e6 Add handlers for FXTRACT and FPREM1 instructions bird_egop 2025-04-18 13:21:46 +03:00
  • adb37fe84f Standardize FPU instruction handler naming convention bird_egop 2025-04-18 13:19:28 +03:00
  • fea700596c Split FINIT/FNINIT handlers for proper instruction recognition bird_egop 2025-04-18 13:17:15 +03:00
  • 167b0e2c48 Fix floating-point instruction test encodings for memory operands bird_egop 2025-04-18 13:13:13 +03:00
  • 57d9a35ec5 Improve FCLEX/FNCLEX handler documentation with accurate behavior descriptions bird_egop 2025-04-18 13:09:39 +03:00
  • 6ea208d8bf Fix FCLEX/FNCLEX instruction types and rename handler for consistency bird_egop 2025-04-18 13:08:18 +03:00
  • a4de35cf41 Implement separate FSTSW handlers and fix test encodings bird_egop 2025-04-18 13:01:02 +03:00
  • cfef24f72d tests and handler fixes bird_egop 2025-04-18 12:49:10 +03:00
  • 4cb20cf741 Fix FNSTSW/FSTSW instruction encodings in test data bird_egop 2025-04-18 12:38:58 +03:00
  • e9c221ac14 Added flag manipulation instruction handlers (STC, CLC, CMC, STD, CLD, STI, CLI, SAHF, LAHF) bird_egop 2025-04-18 12:30:47 +03:00
  • e967c0e0c0 float handlers bird_egop 2025-04-18 02:37:19 +03:00
  • 18ecf31c46 Refactored floating point p-handlers with consistent naming convention bird_egop 2025-04-18 02:31:06 +03:00
  • 2a8cf9534e Fixed floating point comparison handlers for FCOM ST(i) and FCOMP ST(i) instructions bird_egop 2025-04-18 01:25:34 +03:00
  • 84d5652a62 remove duplicate registration bird_egop 2025-04-18 01:02:14 +03:00
  • 66f9e838ad Fixed floating point handlers for qword operands and added missing FCOM ST(0), ST(i) handler bird_egop 2025-04-18 00:44:57 +03:00
  • e6e3e886c8 Removed original floating point handlers that have been replaced by specialized handlers bird_egop 2025-04-18 00:23:21 +03:00
  • d216c29315 Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes. bird_egop 2025-04-18 00:22:02 +03:00
  • ec56576116 Refactored floating point handlers into specialized classes for better organization and maintainability bird_egop 2025-04-17 23:57:16 +03:00
  • 5916d13995 Reorganize floating point handlers into logical subfolders bird_egop 2025-04-17 23:48:09 +03:00
  • 963248dca0 Refactor floating point handlers to use ReadModRMFpu method bird_egop 2025-04-17 23:33:56 +03:00
  • df453b930f fixes bird_egop 2025-04-17 22:54:19 +03:00
  • 4d2db05a07 Implemented additional SBB instruction handlers for register-register and register-memory operations bird_egop 2025-04-17 22:04:12 +03:00
  • 33dc0b0fa2 Implemented SBB instruction handlers for the x86 disassembler bird_egop 2025-04-17 21:49:44 +03:00
  • a62812f71c implement shift and rotate handlers. Fix tests bird_egop 2025-04-17 21:35:49 +03:00
  • a9d4c39717 add misc handlers, cleanup and fixes bird_egop 2025-04-17 20:47:51 +03:00
  • 124493cd94 Fixes to tests and ModRM + SIB bird_egop 2025-04-17 20:06:18 +03:00
  • 7c0e6d7f3a Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions bird_egop 2025-04-17 18:39:34 +03:00
  • dd97a00c2b Added 16-bit ADD handlers for r/m16, imm16 and r/m16, imm8 instructions bird_egop 2025-04-17 01:43:45 +03:00
  • 3fc0ebf1d5 Unified ADC accumulator handlers into a single handler bird_egop 2025-04-17 01:33:58 +03:00
  • 8c9b34ef09 Fixed PushImm16Handler registration order to correctly handle PUSH imm16 with operand size prefix bird_egop 2025-04-16 21:46:08 +03:00
  • fa1a7f582c Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv bird_egop 2025-04-16 21:44:02 +03:00
  • 089fe4dfd4 Removed duplicate AndImmWithRm32Handler file bird_egop 2025-04-16 21:27:23 +03:00
  • b210764caa Removed duplicate AND handler and added detailed opcode comments to XOR handlers. Fixed potential naming inconsistencies in handler registrations. bird_egop 2025-04-16 21:25:46 +03:00
  • e8955b1ebd Improved code documentation in InstructionHandlerFactory. Added detailed opcode comments to handler registration lines and fixed duplicate handler registrations in RegisterAllHandlers method. bird_egop 2025-04-16 21:24:09 +03:00
  • 9096267f73 Added OrRm32R32Handler for OR r/m32, r32 (opcode 09) instruction and registered it in InstructionHandlerFactory. This fixes failing OR instruction tests. bird_egop 2025-04-16 21:20:40 +03:00
  • eac8e9ea69 Fixed NOT instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax] and displacement addressing. bird_egop 2025-04-16 21:17:48 +03:00
  • 226ec25549 Fixed DIV and IDIV instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax], [ebp], and displacement addressing. bird_egop 2025-04-16 21:16:31 +03:00
  • 9da33e12c4 Fixed IMUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing. bird_egop 2025-04-16 21:11:47 +03:00
  • 800915b534 new handlers and test fixes bird_egop 2025-04-16 20:54:08 +03:00
  • f654f64c71 Created dedicated Mul namespace for MUL instruction handlers. Implemented MulRm8Handler for MUL r/m8 instruction (opcode F6 /4) and moved MulRm32Handler to the new namespace. Updated InstructionHandlerFactory to register both handlers. bird_egop 2025-04-16 20:43:06 +03:00
  • be2dfc3dc5 Fixed MUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] and direct memory addressing. bird_egop 2025-04-16 20:40:18 +03:00
  • 72ad1c0d90 Fixed NEG instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing. bird_egop 2025-04-16 20:37:46 +03:00
  • d2279f4720 Added NegRm8Handler for NEG r/m8 instruction (opcode F6 /3). Registered the new handler in InstructionHandlerFactory. bird_egop 2025-04-16 20:29:26 +03:00
  • f702e9da84 Fixed special case in MOV tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement. bird_egop 2025-04-16 20:27:00 +03:00
  • 41a4e5884d Fixed special case in INC/DEC tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement. bird_egop 2025-04-16 20:18:14 +03:00
  • 58b739d922 Fixed special case in LEA test with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test case with Mod=01 and zero displacement. bird_egop 2025-04-16 20:16:31 +03:00
  • a474c4b7e4 Fixed invalid test cases in x86 disassembler tests. Added comments explaining special cases in x86 encoding and added valid test cases for LEA with different destination registers. bird_egop 2025-04-16 20:13:07 +03:00
  • 09786b781b Added detailed comments to test files explaining x86 encoding special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement, 3) SIB byte with EBP as base register special cases bird_egop 2025-04-16 19:58:34 +03:00
  • e5b63270b6 Added detailed comments explaining x86 ModR/M special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement bird_egop 2025-04-16 19:54:15 +03:00
  • 154e811d2d Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4) bird_egop 2025-04-16 19:50:00 +03:00
  • bc6d32a725 Fixed JP and JNP instruction types in TwoByteConditionalJumpHandler bird_egop 2025-04-16 19:44:37 +03:00
  • db96af74ff Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types bird_egop 2025-04-16 19:43:03 +03:00
  • 193f9cd2d8 refactor modrm decoder more bird_egop 2025-04-16 19:14:11 +03:00