mirrors/uv-k5-firmware-custom
0
Fork 0
mirror of https://github.com/OneOfEleven/uv-k5-firmware-custom.git synced 2025-04-28 14:21:25 +03:00
Code Issues Releases Activity

updates

Browse Source
This commit is contained in:
OneOfEleven 2023-10-27 10:52:32 +01:00
parent 78da1d5610
commit ab0c37290f
23 changed files with 480 additions and 318 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -14,7 +14,7 @@ ENABLE_LTO := 1
ENABLE_UART := 1
ENABLE_UART_DEBUG := 1
# AirCopy 2.5 kB
ENABLE_AIRCOPY := 1
ENABLE_AIRCOPY := 0
ENABLE_AIRCOPY_REMEMBER_FREQ := 1
ENABLE_AIRCOPY_RX_REBOOT := 0
# FM Radio 4.2 kB

4
app/action.c
View File

@ -30,7 +30,9 @@
#endif
#include "driver/bk4819.h"
#include "driver/gpio.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "functions.h"
#include "misc.h"
#include "settings.h"

4
app/aircopy.c
View File

@ -28,7 +28,9 @@
#include "driver/eeprom.h"
#include "driver/gpio.h"
#include "driver/system.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "misc.h"
#include "radio.h"

116
app/app.c
View File

@ -44,7 +44,9 @@
#include "driver/keyboard.h"
#include "driver/st7565.h"
#include "driver/system.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "am_fix.h"
#include "dtmf.h"
#include "external/printf/printf.h"
@ -492,7 +494,7 @@ bool APP_start_listening(function_type_t Function, const bool reset_am_fix)
#endif
#ifdef ENABLE_MDC1200
MDC1200_reset_rx();
// MDC1200_reset_rx();
#endif
// clear the other vfo's rssi level (to hide the antenna symbol)
@ -586,7 +588,7 @@ bool APP_start_listening(function_type_t Function, const bool reset_am_fix)
(g_eeprom.volume_gain << 4) | // AF Rx Gain-2
(g_eeprom.dac_gain << 0)); // AF DAC Gain (after Gain-1 and Gain-2)
}
#ifdef ENABLE_VOICE
#ifdef MUTE_AUDIO_FOR_VOICE
if (g_voice_write_index == 0)
@ -920,8 +922,10 @@ void APP_process_radio_interrupts(void)
while (BK4819_ReadRegister(0x0C) & (1u << 0))
{ // BK chip interrupt request
uint16_t interrupt_bits;
BK4819_WriteRegister(0x02, 0);
const uint16_t interrupt_bits = BK4819_ReadRegister(0x02);
interrupt_bits = BK4819_ReadRegister(0x02);
if (interrupt_bits & BK4819_REG_02_DTMF_5TONE_FOUND)
{ // save the RX'ed DTMF character
@ -1016,8 +1020,8 @@ void APP_process_radio_interrupts(void)
if (interrupt_bits & BK4819_REG_02_SQUELCH_CLOSED)
{
BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, false); // LED off
g_squelch_open = false;
BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, false); // LED off
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("squelch closed\r\n");
@ -1026,7 +1030,6 @@ void APP_process_radio_interrupts(void)
if (interrupt_bits & BK4819_REG_02_SQUELCH_OPENED)
{
// BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, true); // LED on
g_squelch_open = true;
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
@ -1036,48 +1039,119 @@ void APP_process_radio_interrupts(void)
#ifdef ENABLE_MDC1200
{
const uint16_t sync_flags = BK4819_ReadRegister(0x0B);
// if (sync_flags & ((1u << 7) | (1u << 6)))
// { // RX sync found (pos or neg version)
// #if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
// UART_printf("fsk rx sync\r\n");
// #endif
// }
const uint16_t rx_sync_flags = BK4819_ReadRegister(0x0B);
const bool rx_sync_neg = (rx_sync_flags & (1u << 7)) ? true : false;
const bool rx_sync_pos = (rx_sync_flags & (1u << 6)) ? true : false;
const bool rx_sync = (interrupt_bits & BK4819_REG_02_FSK_RX_SYNC) ? true : false;
const bool rx_finished = (interrupt_bits & BK4819_REG_02_FSK_RX_FINISHED) ? true : false;
const bool rx_fifo_almost_full = (interrupt_bits & BK4819_REG_02_FSK_FIFO_ALMOST_FULL) ? true : false;
if (sync_flags & (1u << 7))
BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, true); // LED on
if (rx_sync_neg)
{ // RX sync neg found
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx sync neg\r\n");
#endif
}
if (sync_flags & (1u << 6))
if (rx_sync_pos)
{ // RX sync pos found
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx sync pos\r\n");
#endif
}
if (interrupt_bits & BK4819_REG_02_FSK_RX_SYNC)
if (rx_sync)
{
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx sync\r\n");
#endif
}
if (rx_fifo_almost_full)
{
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx almost full\r\n");
#endif
}
if (interrupt_bits & BK4819_REG_02_FSK_RX_FINISHED)
if (rx_finished)
{
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx finished\r\n");
#endif
}
if (interrupt_bits & BK4819_REG_02_FSK_FIFO_ALMOST_FULL)
if (rx_fifo_almost_full)
{
uint8_t buffer[sizeof(mdc1200_sync_suc_xor) + 14];
unsigned int i;
uint8_t op;
uint8_t arg;
uint16_t unit_id;
const uint16_t fsk_reg59 = BK4819_ReadRegister(0x59) & ~((1u << 15) | (1u << 14) | (1u << 12) | (1u << 11));
const unsigned int sync_size = (fsk_reg59 & (1u << 3)) ? 4 : 2;
// const unsigned int size = 1 + ((BK4819_ReadRegister(0x5D) >> 8) & 0xffff);
const unsigned int size = sizeof(buffer) - sync_size;
// 40 C4 B0 32 BA F9 33 18 35 08 83 F6 0C C9
// 0100000011000100101100000011001010111010111110010011001100011000001101010000100010000011111101100000110011001001
// 0100000011000100101100000011001010111010111110010011001100011000001101010000100010000011111101100000000011110101
// 1011111100111011010011111100110101000101000001101100110011100111110010101111011101111100000010011111111100001010
// BF 3B 4F CD 45 06 CC E7 CA F7 7C 09 FF 0A
{ // fetch RX'ed data .. 16-bits at a time
unsigned int k = 0;
// precede the data with the missing sync pattern
for (i = 0; i < sync_size; i++)
buffer[k++] = mdc1200_sync_suc_xor[i] ^ (rx_sync_neg ? 0xff : 0);
for (i = 0; i < (size / 2); i++)
{
const uint16_t word = BK4819_ReadRegister(0x5F);
buffer[k++] = (word >> 8) & 0xff;
buffer[k++] = (word >> 0) & 0xff;
}
}
// clear FIFO's then enable RX
BK4819_WriteRegister(0x59, (1u << 15) | (1u << 14) | fsk_reg59);
BK4819_WriteRegister(0x59, (1u << 12) | fsk_reg59);
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("fsk rx almost full\r\n");
UART_SendText("fsk rx ");
for (i = 0; i < sizeof(buffer); i++)
UART_printf(" %02X", buffer[i]);
UART_SendText("\r\n");
#endif
if (!g_squelch_open)
BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, false); // LED off
if (MDC1200_process_rx(
buffer,
sizeof(buffer),
// (sync_flags & (1u << 7)) ? true : false, // true if the sync pattern is bit inverted
&op,
&arg,
&unit_id))
{
g_beep_to_play = BEEP_880HZ_60MS_TRIPLE_BEEP;
// TODO: display the packet
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("MDC1200 op %02X arg %02X id %04X\r\n", op, arg, unit_id);
#endif
}
}
}
#endif

4
app/fm.c
View File

@ -24,7 +24,9 @@
#include "driver/bk1080.h"
#include "driver/eeprom.h"
#include "driver/gpio.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "functions.h"
#include "misc.h"

4
app/generic.c
View File

@ -25,7 +25,9 @@
#include "app/search.h"
#include "audio.h"
#include "driver/keyboard.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "dtmf.h"
#include "external/printf/printf.h"
#include "functions.h"

4
app/main.c
View File

@ -32,7 +32,9 @@
#include "bsp/dp32g030/gpio.h"
#include "driver/bk4819.h"
#include "driver/gpio.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "dtmf.h"
#include "frequencies.h"
#include "misc.h"

4
app/menu.c
View File

@ -32,7 +32,9 @@
#include "driver/gpio.h"
#include "driver/keyboard.h"
#include "driver/st7565.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "helper/battery.h"
#include "misc.h"

4
app/search.c
View File

@ -20,7 +20,9 @@
#include "audio.h"
#include "board.h"
#include "driver/bk4819.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "misc.h"
#include "radio.h"

4
app/uart.c
View File

@ -33,7 +33,9 @@
#include "driver/crc.h"
#include "driver/eeprom.h"
#include "driver/gpio.h"
#include "driver/uart.h"
#if defined(ENABLE_UART)
#include "driver/uart.h"
#endif
#include "functions.h"
#include "misc.h"
#include "settings.h"

4
audio.c
View File

@ -29,7 +29,9 @@
#include "driver/gpio.h"
#include "driver/system.h"
#include "driver/systick.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "functions.h"
#include "misc.h"
#include "settings.h"

142
driver/bk4819.c
View File

@ -356,13 +356,13 @@ void BK4819_EnableAGC(void)
BK4819_WriteRegister(0x11, 0x027B);
BK4819_WriteRegister(0x10, 0x007A);
BK4819_WriteRegister(0x14, 0x0018);
/*
// undocumented ?
BK4819_WriteRegister(0x49, 0x2A38);
BK4819_WriteRegister(0x7B, 0x318C);
BK4819_WriteRegister(0x7C, 0x595E);
BK4819_WriteRegister(0x20, 0x8DEF);
*/
// fagci had the answer to why we weren't as sensitive!
for (unsigned int i = 0; i < 8; i++)
BK4819_WriteRegister(0x06, ((i & 7u) << 13) | (0x4A << 7) | (0x36 << 0));
@ -567,7 +567,7 @@ void BK4819_set_TX_deviation(unsigned int level)
{
if (level > 4095)
level = 4095;
// REG_40
//
// <15:13> 0 ???
@ -1064,7 +1064,7 @@ void BK4819_StartTone1(const uint16_t frequency, const unsigned int level, const
BK4819_WriteRegister(0x71, scale_freq(frequency));
BK4819_ExitTxMute();
// SYSTEM_DelayMs(2);
GPIO_SetBit(&GPIOC->DATA, GPIOC_PIN_SPEAKER); // enable speaker
SYSTEM_DelayMs(2);
@ -1149,7 +1149,7 @@ void BK4819_Idle(void)
{
BK4819_WriteRegister(0x30, 0);
}
/*
void BK4819_ExitBypass(void)
{
BK4819_SetAF(BK4819_AF_MUTE);
@ -1186,10 +1186,10 @@ void BK4819_ExitBypass(void)
(5u << 3) | // 5 DC Filter band width for Tx (MIC In)
(6u << 0)); // 6 DC Filter band width for Rx (I.F In)
}
*/
void BK4819_PrepareTransmit(void)
{
BK4819_ExitBypass();
// BK4819_ExitBypass();
BK4819_ExitTxMute();
BK4819_TxOn_Beep();
}
@ -1325,8 +1325,8 @@ void BK4819_PlayDTMF(char Code)
BK4819_WriteRegister(0x71, (((uint32_t)tone1 * 103244) + 5000) / 10000); // with rounding
if (tone2 > 0)
BK4819_WriteRegister(0x72, (((uint32_t)tone2 * 103244) + 5000) / 10000); // with rounding
*/
*/
uint32_t index = ((Code >= 65) ? (Code - 55) : ((Code <= 35) ? 15 :((Code <= 42) ? 14 : (Code - '0'))));
const uint16_t tones[2][16] =
@ -1373,7 +1373,7 @@ void BK4819_PlayDTMF(char Code)
{
BK4819_WriteRegister(0x71, (((uint32_t)tones[0][index] * 103244u) + 5000u) / 10000u); // with rounding
BK4819_WriteRegister(0x72, (((uint32_t)tones[1][index] * 103244u) + 5000u) / 10000u); // with rounding
}
}
}
void BK4819_PlayDTMFString(const char *pString, bool bDelayFirst, uint16_t FirstCodePersistTime, uint16_t HashCodePersistTime, uint16_t CodePersistTime, uint16_t CodeInternalTime)
@ -1800,7 +1800,7 @@ void BK4819_reset_fsk(void)
(6u << 4) | // 0 ~ 15 preamble Length Selection
(1u << 3) | // 0 or 1 sync length selection
(0u << 0); // 0 ~ 7 ???
BK4819_WriteRegister(0x3F, 0); // disable interrupts
BK4819_WriteRegister(0x59, (1u << 15) | (1u << 14) | fsk_reg59); // clear FIFO's
BK4819_WriteRegister(0x59, (0u << 15) | (0u << 14) | fsk_reg59);
@ -1925,19 +1925,19 @@ void BK4819_reset_fsk(void)
void BK4819_start_aircopy_fsk_rx(const unsigned int packet_size)
{
uint16_t fsk_reg59;
BK4819_reset_fsk();
BK4819_WriteRegister(0x02, 0); // clear interrupt flags
// set the packet size
BK4819_WriteRegister(0x5D, ((packet_size - 1) << 8));
BK4819_RX_TurnOn();
// BK4819_WriteRegister(0x3F, BK4819_REG_3F_FSK_RX_FINISHED | BK4819_REG_3F_FSK_FIFO_ALMOST_FULL);
BK4819_WriteRegister(0x3F, BK4819_REG_3F_FSK_RX_SYNC | BK4819_REG_3F_FSK_RX_FINISHED | BK4819_REG_3F_FSK_FIFO_ALMOST_FULL);
// REG_59
//
// <15> 0 TX FIFO
@ -1987,7 +1987,7 @@ void BK4819_reset_fsk(void)
(4u << 4) | // 0 ~ 15 preamble Length Selection .. 1of11 .. a little shorter than the TX length
(1u << 3) | // 0 or 1 sync length selection
(0u << 0); // 0 ~ 7 ???
BK4819_WriteRegister(0x59, (1u << 15) | (1u << 14) | fsk_reg59); // clear FIFO's
BK4819_WriteRegister(0x59, (1u << 13) | (1u << 12) | fsk_reg59); // enable scrambler, enable RX
}
@ -2001,18 +2001,18 @@ void BK4819_reset_fsk(void)
// <15> 0 TONE-1
// 1 = enable
// 0 = disable
//
//
// <14:8> 0 TONE-1 gain
//
//
// <7> 0 TONE-2
// 1 = enable
// 0 = disable
//
//
// <6:0> 0 TONE-2 / FSK gain
// 0 ~ 127
//
// enable tone-2, set gain
// REG_72
//
// <15:0> 0x2854 TONE-2 / FSK frequency control word
@ -2020,7 +2020,7 @@ void BK4819_reset_fsk(void)
// = freq(Hz) * 10.48576 for XTAL 12.8M / 19.2M / 25.6M / 38.4M
//
// tone-2 = 1200Hz
// REG_58
//
// <15:13> 1 FSK TX mode selection
@ -2068,23 +2068,23 @@ void BK4819_reset_fsk(void)
// <0> 1 FSK enable
// 0 = disable
// 1 = enable
// REG_5C
//
// <15:7> ???
//
//
// <6> 1 CRC option enable
// 0 = disable
// 1 = enable
//
//
// <5:0> ???
//
// disable CRC
// REG_5D
//
// set the packet size
if (enable)
{
const uint16_t fsk_reg59 =
@ -2099,15 +2099,15 @@ void BK4819_reset_fsk(void)
(0u << 4) | // 0 ~ 15 preamble length selection .. mdc1200 does not send bit reversals :(
(1u << 3) | // 0/1 sync length selection
(0u << 0); // 0 ~ 7 ???
BK4819_WriteRegister(0x70,
( 0u << 15) | // 0
( 0u << 8) | // 0
( 1u << 7) | // 1
(96u << 0)); // 96
BK4819_WriteRegister(0x72, ((1200u * 103244) + 5000) / 10000); // with rounding
BK4819_WriteRegister(0x58,
(1u << 13) | // 1 FSK TX mode selection
// 0 = FSK 1.2K and FSK 2.4K TX .. no tones, direct FM
@ -2155,33 +2155,33 @@ void BK4819_reset_fsk(void)
// 0 = disable
// 1 = enable
// 0000 0100 1000 1101 1011 1111 0110 0110 0101 1000
// 0 4 8 D B F 6 6 5 8
//
// REG_5A
// REG_5A .. bytes 0 & 1 sync pattern
//
// <15:8> sync byte 0
// < 7:0> sync byte 1
BK4819_WriteRegister(0x5A, 0x8DBF);
BK4819_WriteRegister(0x5A, ((uint16_t)mdc1200_sync_suc_xor[0] << 8) | (mdc1200_sync_suc_xor[1] << 0));
// REG_5B .. bytes 2 & 3 sync pattern
//
// <15:8> sync byte 2
// < 7:0> sync byte 3
BK4819_WriteRegister(0x5B, 0x6658);
BK4819_WriteRegister(0x5B, ((uint16_t)mdc1200_sync_suc_xor[2] << 8) | (mdc1200_sync_suc_xor[3] << 0));
// disable CRC
BK4819_WriteRegister(0x5C, 0x5625 | (0u << 6));
// packet size (14 bytes)
BK4819_WriteRegister(0x5D, ((14u - 1) << 8));
// packet size .. 14 bytes - size of a single mdc1200 packet
BK4819_WriteRegister(0x5D, (((sizeof(mdc1200_sync_suc_xor) - 4 + 14) - 1) << 8));
// clear FIFO's then enable RX
BK4819_WriteRegister(0x59, (1u << 15) | (1u << 14) | fsk_reg59);
BK4819_WriteRegister(0x59, (1u << 12) | fsk_reg59);
// clear interrupt flags
BK4819_WriteRegister(0x02, 0);
BK4819_WriteRegister(0x02, 0);
BK4819_RX_TurnOn();
// enable interrupts
BK4819_WriteRegister(0x3F, BK4819_ReadRegister(0x3F) | BK4819_REG_3F_FSK_RX_SYNC | BK4819_REG_3F_FSK_RX_FINISHED | BK4819_REG_3F_FSK_FIFO_ALMOST_FULL);
}
@ -2196,7 +2196,7 @@ void BK4819_reset_fsk(void)
{
uint16_t fsk_reg59;
uint8_t packet[42];
// create the MDC1200 packet
const unsigned int size = MDC1200_encode_single_packet(packet, op, arg, id);
@ -2210,10 +2210,10 @@ void BK4819_reset_fsk(void)
BK4819_SetAF(BK4819_AF_BEEP);
GPIO_SetBit(&GPIOC->DATA, GPIOC_PIN_SPEAKER);
#endif
// *******************
// need to turn off CTCSS/CDCSS during FFSK
// REG_51
//
// <15> 1 = Enable TxCTCSS/CDCSS
@ -2223,7 +2223,7 @@ void BK4819_reset_fsk(void)
BK4819_WriteRegister(0x51, 0);
// *******************************************
// REG_40
//
// <15:13> 0 ???
@ -2235,11 +2235,11 @@ void BK4819_reset_fsk(void)
//
// <11:0> 0x04D0 RF TX deviation tuning (both in-band signal and sub-audio)
// 0 ~ 4095
const uint16_t tx_dev = BK4819_ReadRegister(0x40);
// BK4819_WriteRegister(0x40, (0u << 12) | (1232 << 0)); // 000 0 010011010000
BK4819_WriteRegister(0x40, (tx_dev & 0xf000) | (1050 << 0)); // reduce the deviation a little
// REG_2B 0
//
// <10> 0 AF RX HPF 300Hz filter
@ -2283,10 +2283,10 @@ void BK4819_reset_fsk(void)
(0u << 0)); // disable RX DSP
SYSTEM_DelayMs(20);
// *******************************************
// MDC1200 uses 1200/1800 Hz FSK tone frequencies 1200 bits/s
// MDC1200 uses 1200/1800 Hz FSK tone frequencies 1200 bits/s
//
BK4819_WriteRegister(0x58, // 0x37C3); // 001 101 11 11 00 001 1
(1u << 13) | // 1 FSK TX mode selection
@ -2334,7 +2334,7 @@ void BK4819_reset_fsk(void)
(1u << 0)); // 1 FSK enable
// 0 = disable
// 1 = enable
// REG_72
//
// <15:0> 0x2854 TONE-2 / FSK frequency control word
@ -2344,7 +2344,7 @@ void BK4819_reset_fsk(void)
// tone-2 = 1200Hz
//
BK4819_WriteRegister(0x72, ((1200u * 103244) + 5000) / 10000); // with rounding
// REG_70
//
// <15> 0 TONE-1
@ -2368,7 +2368,7 @@ void BK4819_reset_fsk(void)
( 1u << 7) | // 1
(96u << 0)); // 96
// (127u << 0));
// REG_59
//
// <15> 0 TX FIFO
@ -2417,27 +2417,27 @@ void BK4819_reset_fsk(void)
(0u << 4) | // 0 ~ 15 preamble length
(0u << 3) | // 0 ~ 1 sync length
(0u << 0); // 0 ~ 7 ???
// Set entire packet length (not including the pre-amble and sync bytes we can't seem to disable)
BK4819_WriteRegister(0x5D, ((size - 1) << 8));
BK4819_WriteRegister(0x59, (1u << 15) | (1u << 14) | fsk_reg59); // clear FIFO's
BK4819_WriteRegister(0x59, fsk_reg59); // release the FIFO reset
// REG_5A
//
// <15:8> 0x55 FSK Sync Byte 0 (Sync Byte 0 first, then 1,2,3)
// <7:0> 0x55 FSK Sync Byte 1
//
BK4819_WriteRegister(0x5A, 0x0000); // bytes 1 & 2
// REG_5B
//
// <15:8> 0x55 FSK Sync Byte 2 (Sync Byte 0 first, then 1,2,3)
// <7:0> 0xAA FSK Sync Byte 3
//
BK4819_WriteRegister(0x5B, 0x0000); // bytes 2 & 3
// CRC setting (plus other stuff we don't know what)
//
// REG_5C
@ -2454,28 +2454,28 @@ void BK4819_reset_fsk(void)
//
// BK4819_WriteRegister(0x5C, 0xAA30); // 101010100 0 110000
BK4819_WriteRegister(0x5C, 0); // setting to '0' doesn't make any difference !
{ // load the entire packet data into the TX FIFO buffer
unsigned int i;
const uint16_t *p = (const uint16_t *)packet;
for (i = 0; i < (size / sizeof(p[0])); i++)
BK4819_WriteRegister(0x5F, p[i]); // load 16-bits at a time
}
// enable tx interrupt
BK4819_WriteRegister(0x3F, BK4819_REG_3F_FSK_TX_FINISHED);
// enable TX
BK4819_WriteRegister(0x59, (1u << 11) | fsk_reg59);
{ // packet time is ..
// 173ms for PTT ID, acks, emergency
// 266ms for call alert and sel-calls
// allow up to 350ms for the TX to complete
// if it takes any longer then somethings gone wrong, we shut the TX down
unsigned int timeout = 350 / 5;
unsigned int timeout = 350 / 5;
while (timeout-- > 0)
{
SYSTEM_DelayMs(5);
@ -2487,12 +2487,12 @@ void BK4819_reset_fsk(void)
}
}
}
GPIO_ClearBit(&GPIOC->DATA, GPIOC_PIN_SPEAKER); // don't need the speaker enabled during TX
// disable FSK
BK4819_WriteRegister(0x59, fsk_reg59);
BK4819_WriteRegister(0x3F, 0); // disable interrupts
BK4819_WriteRegister(0x70, 0);
BK4819_WriteRegister(0x58, 0);
@ -2507,11 +2507,11 @@ void BK4819_reset_fsk(void)
BK4819_WriteRegister(0x51, css_val);
// ****************
BK4819_EnterTxMute();
BK4819_SetAF(BK4819_AF_MUTE);
BK4819_WriteRegister(0x30,
(1u << 15) | // enable VCO calibration
(1u << 14) | // enable something or other
@ -2523,7 +2523,7 @@ void BK4819_reset_fsk(void)
(1u << 2) | // enable MIC ADC
(1u << 1) | // enable TX DSP
(0u << 0)); // disable RX DSP
BK4819_ExitTxMute();
}
#endif

2
driver/bk4819.h
View File

@ -118,7 +118,7 @@ void BK4819_TurnsOffTones_TurnsOnRX(void);
void BK4819_reset_fsk(void);
void BK4819_Idle(void);
void BK4819_ExitBypass(void);
//void BK4819_ExitBypass(void);
void BK4819_PrepareTransmit(void);
void BK4819_TxOn_Beep(void);
void BK4819_ExitSubAu(void);

BIN
firmware.bin
View File

Binary file not shown.

BIN
firmware.packed.bin
View File

Binary file not shown.

4
frequencies.c
View File

@ -14,7 +14,9 @@
* limitations under the License.
*/
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "misc.h"
#include "settings.h"

4
functions.c
View File

@ -29,7 +29,9 @@
#include "driver/bk4819.h"
#include "driver/gpio.h"
#include "driver/system.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "frequencies.h"
#include "functions.h"
#include "helper/battery.h"

11
main.c
View File

@ -32,9 +32,14 @@
#include "driver/st7565.h"
#include "driver/system.h"
#include "driver/systick.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "helper/battery.h"
#include "helper/boot.h"
#ifdef ENABLE_MDC1200
#include "mdc1200.h"
#endif
#include "misc.h"
#include "radio.h"
#include "settings.h"
@ -90,6 +95,10 @@ void Main(void)
BK4819_Init();
#ifdef ENABLE_MDC1200
mdc1200_init();
#endif
BOARD_ADC_GetBatteryInfo(&g_usb_current_voltage, &g_usb_current);
BOARD_EEPROM_load();

448
mdc1200.c
View File

@ -2,7 +2,9 @@
#include <string.h>
#include "driver/crc.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "mdc1200.h"
#include "misc.h"
@ -15,9 +17,18 @@
// >= 24-bit pre-amble
// 40-bit sync
//
//static const uint8_t pre_amble[] = {0x00, 0x00, 0x00, 0xCC}; / add some bit reversals just before the sync pattern
static const uint8_t pre_amble[] = {0x00, 0x00, 0x00};
static const uint8_t sync[] = {0x07, 0x09, 0x2a, 0x44, 0x6f};
const uint8_t mdc1200_pre_amble[] = {0x00, 0x00, 0x00};
const uint8_t mdc1200_sync[5] = {0x07, 0x09, 0x2a, 0x44, 0x6f};
//
// before successive bit xorring:
// 0x07092A446F
// 0000 0111 0000 1001 0010 1010 0100 0100 0110 1111
//
// after successive bit xorring:
// 0000 0100 1000 1101 1011 1111 0110 0110 0101 1000
// 0x048DBF6658
//
uint8_t mdc1200_sync_suc_xor[sizeof(mdc1200_sync)];
/*
uint8_t bit_reverse_8(uint8_t n)
@ -52,7 +63,7 @@ uint32_t bit_reverse_32(uint32_t n)
#if 1
uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
uint16_t compute_crc(const void *data, const unsigned int data_len)
{ // let the CPU's hardware do some work :)
uint16_t crc;
CRC_InitReverse();
@ -63,14 +74,15 @@ uint32_t bit_reverse_32(uint32_t n)
#elif 1
uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
uint16_t compute_crc(const void *data, const unsigned int data_len)
{ // using the reverse computation and polynominal avoids having to reverse the bit order during and after
unsigned int i;
uint16_t crc = 0;
unsigned int i;
const uint8_t *data8 = (const uint8_t *)data;
uint16_t crc = 0;
for (i = 0; i < data_len; i++)
{
unsigned int k;
crc ^= data[i];
crc ^= data8[i];
for (k = 8; k > 0; k--)
crc = (crc & 1u) ? (crc >> 1) ^ 0x8408 : crc >> 1;
}
@ -79,17 +91,18 @@ uint32_t bit_reverse_32(uint32_t n)
#else
uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
uint16_t compute_crc(const void *data, const unsigned int data_len)
{
unsigned int i;
uint16_t crc = 0;
unsigned int i;
const uint8_t *data8 = (const uint8_t *)data;
uint16_t crc = 0;
for (i = 0; i < data_len; i++)
{
uint8_t mask;
// bit reverse each data byte
const uint8_t bits = bit_reverse_8(*data++);
const uint8_t bits = bit_reverse_8(*data8++);
for (mask = 0x0080; mask != 0; mask >>= 1)
{
@ -111,16 +124,17 @@ uint32_t bit_reverse_32(uint32_t n)
// ************************************
// RX
void error_correction(uint8_t *data)
void error_correction(void *data)
{ // can correct up to 3 or 4 corrupted bits (I think)
int i;
uint8_t shift_reg;
uint8_t syn;
uint8_t *data8 = (uint8_t *)data;
for (i = 0, shift_reg = 0, syn = 0; i < FEC_K; i++)
{
const uint8_t bi = data[i];
const uint8_t bi = data8[i];
int bit_num;
for (bit_num = 0; bit_num < 8; bit_num++)
{
@ -129,7 +143,7 @@ void error_correction(uint8_t *data)
shift_reg = (shift_reg << 1) | ((bi >> bit_num) & 1u);
b = ((shift_reg >> 6) ^ (shift_reg >> 5) ^ (shift_reg >> 2) ^ (shift_reg >> 0)) & 1u;
syn = (syn << 1) | (((b ^ (data[i + FEC_K] >> bit_num)) & 1u) ? 1u : 0u);
syn = (syn << 1) | (((b ^ (data8[i + FEC_K] >> bit_num)) & 1u) ? 1u : 0u);
if (syn & 0x80) k++;
if (syn & 0x20) k++;
@ -146,21 +160,22 @@ void error_correction(uint8_t *data)
ii--;
}
if (ii >= 0)
data[ii] ^= 1u << bn; // fix a bit
data8[ii] ^= 1u << bn; // fix a bit
syn ^= 0xA6; // 10100110
}
}
}
}
/*
void xor_demodulation(uint8_t *data, const unsigned int size, const bool sync_inverted)
void xor_demodulation(void *data, const unsigned int size, const bool sync_inverted)
{
unsigned int i;
uint8_t *data8 = (uint8_t *)data;
uint8_t prev_bit = 0;
for (i = 0; i < size; i++)
{
int bit_num;
uint8_t in = data[i];
uint8_t in = data8[i];
uint8_t out = 0;
for (bit_num = 7; bit_num >= 0; bit_num--)
{
@ -171,14 +186,15 @@ void xor_demodulation(uint8_t *data, const unsigned int size, const bool sync_in
prev_bit = new_bit;
out |= bit << bit_num;
}
data[i] = out;
data8[i] = out;
}
}
*/
bool decode_data(uint8_t *data)
bool decode_data(void *data)
{
uint16_t crc1;
uint16_t crc2;
uint8_t *data8 = (uint8_t *)data;
{ // de-interleave
@ -211,7 +227,7 @@ bool decode_data(uint8_t *data)
for (m = 0; m < FEC_K; m++)
{
const unsigned int n = (m * 16) + i;
deinterleaved[k++] = (data[n >> 3] >> ((7 - n) & 7u)) & 1u;
deinterleaved[k++] = (data8[n >> 3] >> ((7 - n) & 7u)) & 1u;
}
}
@ -223,7 +239,7 @@ bool decode_data(uint8_t *data)
for (k = 0; k < 8; k++)
if (deinterleaved[m++])
b |= 1u << k;
data[i] = b;
data8[i] = b;
}
}
@ -236,7 +252,7 @@ bool decode_data(uint8_t *data)
// 01 80 1234 2E3E 00 6580A862DD8808
crc1 = compute_crc(data, 4);
crc2 = ((uint16_t)data[5] << 8) | (data[4] << 0);
crc2 = ((uint16_t)data8[5] << 8) | (data8[4] << 0);
return (crc1 == crc2) ? true : false;
}
@ -244,14 +260,15 @@ bool decode_data(uint8_t *data)
// **********************************************************
// TX
void xor_modulation(uint8_t *data, const unsigned int size)
void xor_modulation(void *data, const unsigned int size)
{ // exclusive-or succesive bits - the entire packet
unsigned int i;
uint8_t *data8 = (uint8_t *)data;
uint8_t prev_bit = 0;
for (i = 0; i < size; i++)
{
int bit_num;
uint8_t in = data[i];
uint8_t in = data8[i];
uint8_t out = 0;
for (bit_num = 7; bit_num >= 0; bit_num--)
{
@ -260,11 +277,11 @@ void xor_modulation(uint8_t *data, const unsigned int size)
out |= 1u << bit_num; // previous bit and new bit are different - send a '1'
prev_bit = new_bit;
}
data[i] = out ^ 0xff;
data8[i] = out ^ 0xff;
}
}
uint8_t * encode_data(uint8_t *data)
uint8_t * encode_data(void *data)
{
// R=1/2 K=7 convolutional coder
//
@ -276,20 +293,22 @@ uint8_t * encode_data(uint8_t *data)
// 3. for each bit, calculate the modulo-2 sum: bit(n-0) + bit(n-2) + bit(n-5) + bit(n-6)
// 4. then for each byte of resulting output, again reverse those bits to generate the values shown above
uint8_t *data8 = (uint8_t *)data;
{ // add the FEC bits to the end of the data
unsigned int i;
uint8_t shift_reg = 0;
for (i = 0; i < FEC_K; i++)
{
unsigned int bit_num;
const uint8_t bi = data[i];
const uint8_t bi = data8[i];
uint8_t bo = 0;
for (bit_num = 0; bit_num < 8; bit_num++)
{
shift_reg = (shift_reg << 1) | ((bi >> bit_num) & 1u);
bo |= (((shift_reg >> 6) ^ (shift_reg >> 5) ^ (shift_reg >> 2) ^ (shift_reg >> 0)) & 1u) << bit_num;
}
data[FEC_K + i] = bo;
data8[FEC_K + i] = bo;
}
}
@ -301,7 +320,7 @@ uint8_t * encode_data(uint8_t *data)
unsigned int i;
UART_printf("mdc1200 tx1 %u ", size);
for (i = 0; i < size; i++)
UART_printf(" %02X", data[i]);
UART_printf(" %02X", data8[i]);
UART_SendText("\r\n");
}
#endif
@ -310,7 +329,7 @@ uint8_t * encode_data(uint8_t *data)
unsigned int i;
unsigned int k;
uint8_t interleaved[(FEC_K * 2) * 8];
uint8_t interleaved[(FEC_K * 2) * 8]; // temp individual bit storage
// interleave order
// 0, 16, 32, 48, 64, 80, 96,
@ -334,7 +353,7 @@ uint8_t * encode_data(uint8_t *data)
for (i = 0, k = 0; i < (FEC_K * 2); i++)
{
unsigned int bit_num;
const uint8_t b = data[i];
const uint8_t b = data8[i];
for (bit_num = 0; bit_num < 8; bit_num++)
{
interleaved[k] = (b >> bit_num) & 1u;
@ -352,23 +371,23 @@ uint8_t * encode_data(uint8_t *data)
for (bit_num = 7; bit_num >= 0; bit_num--)
if (interleaved[k++])
b |= 1u << bit_num;
data[i] = b;
data8[i] = b;
}
}
return data + (FEC_K * 2);
return data8 + (FEC_K * 2);
}
unsigned int MDC1200_encode_single_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id)
unsigned int MDC1200_encode_single_packet(void *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id)
{
unsigned int size;
uint16_t crc;
uint8_t *p = data;
uint8_t *p = (uint8_t *)data;
memcpy(p, pre_amble, sizeof(pre_amble));
p += sizeof(pre_amble);
memcpy(p, sync, sizeof(sync));
p += sizeof(sync);
memcpy(p, mdc1200_pre_amble, sizeof(mdc1200_pre_amble));
p += sizeof(mdc1200_pre_amble);
memcpy(p, mdc1200_sync, sizeof(mdc1200_sync));
p += sizeof(mdc1200_sync);
p[0] = op;
p[1] = arg;
@ -381,14 +400,15 @@ unsigned int MDC1200_encode_single_packet(uint8_t *data, const uint8_t op, const
p = encode_data(p);
size = (unsigned int)(p - data);
size = (unsigned int)(p - (uint8_t *)data);
/*
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
{
unsigned int i;
const uint8_t *data8 = (const uint8_t *)data;
UART_printf("mdc1200 tx2 %u ", size);
for (i = 0; i < size; i++)
UART_printf(" %02X", data[i]);
UART_printf(" %02X", data8[i]);
UART_SendText("\r\n");
}
#endif
@ -398,16 +418,16 @@ unsigned int MDC1200_encode_single_packet(uint8_t *data, const uint8_t op, const
return size;
}
/*
unsigned int MDC1200_encode_double_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id, const uint8_t b0, const uint8_t b1, const uint8_t b2, const uint8_t b3)
unsigned int MDC1200_encode_double_packet(void *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id, const uint8_t b0, const uint8_t b1, const uint8_t b2, const uint8_t b3)
{
unsigned int size;
uint16_t crc;
uint8_t *p = data;
uint8_t *p = (uint8_t *)data;
memcpy(p, pre_amble, sizeof(pre_amble));
p += sizeof(pre_amble);
memcpy(p, sync, sizeof(sync));
p += sizeof(sync);
memcpy(p, mdc1200_pre_amble, sizeof(mdc1200_pre_amble));
p += sizeof(mdc1200_pre_amble);
memcpy(p, mdc1200_sync, sizeof(mdc1200_sync));
p += sizeof(mdc1200_sync);
p[0] = op;
p[1] = arg;
@ -431,7 +451,7 @@ unsigned int MDC1200_encode_double_packet(uint8_t *data, const uint8_t op, const
p = encode_data(p);
size = (unsigned int)(p - data);
size = (unsigned int)(p - (uint8_t *)data);
xor_modulation(data, size);
@ -459,172 +479,188 @@ void MDC1200_reset_rx(void)
memset(&rx, 0, sizeof(rx));
}
bool MDC1200_process_rx(const uint8_t rx_byte, uint8_t *op, uint8_t *arg, uint16_t *unit_id)
bool MDC1200_process_rx(
const void *buffer,
const unsigned int size,
//const bool inverted,
uint8_t *op,
uint8_t *arg,
uint16_t *unit_id)
{
unsigned int i;
int k;
const uint8_t *buffer8 = (const uint8_t *)buffer;
unsigned int index;
for (k = 7; k >= 0; k--)
memset(&rx, 0, sizeof(rx));
for (index = 0; index < size; index++)
{
rx.prev_bit = rx.bit;
unsigned int i;
int bit;
rx.bit = (rx_byte >> k) & 1u;
if (rx.stage == 0)
{ // scanning for the pre-amble
rx.xor_bit = rx.bit & 1u;
}
else
const uint8_t rx_byte = buffer8[index];
for (bit = 7; bit >= 0; bit--)
{
rx.xor_bit = (rx.xor_bit ^ rx.bit) & 1u;
if (rx.inverted_sync)
rx.xor_bit ^= 1u;
}
rx.shift_reg = (rx.shift_reg << 1) | (rx.xor_bit & 1u);
rx.bit_count++;
// *********
if (rx.stage == 0)
{ // looking for pre-amble
if (rx.bit_count < 20 || (rx.shift_reg & 0xfffff) != 1u)
rx.prev_bit = rx.bit;
rx.bit = (rx_byte >> bit) & 1u;
if (rx.stage == 0)
{ // scanning for the pre-amble
rx.xor_bit = rx.bit & 1u;
}
else
{
rx.xor_bit = (rx.xor_bit ^ rx.bit) & 1u;
if (rx.inverted_sync)
rx.xor_bit ^= 1u;
}
rx.shift_reg = (rx.shift_reg << 1) | (rx.xor_bit & 1u);
rx.bit_count++;
// *********
if (rx.stage == 0)
{ // looking for pre-amble
if (rx.bit_count < 20 || (rx.shift_reg & 0xfffff) != 1u)
continue;
rx.xor_bit = 1;
rx.stage = 1;
rx.bit_count = 1;
//s.printf("%5u %2u %u pre-amble found", index, rx_bit_count, rx_packet_stage);
//Memo1->Lines->Add(s);
}
if (rx.stage < 2)
{
//s.printf("%5u %3u %u ", index, rx_bit_count, rx_packet_stage);
//for (uint64_t mask = 1ull << ((sizeof(rx_shift_reg) * 8) - 1); mask != 0; mask >>= 1)
// s += (rx_shift_reg & mask) ? '#' : '.';
//s += " ";
//for (int i = sizeof(rx_shift_reg) - 1; i >= 0; i--)
//{
// String s2;
// s2.printf(" %02X", (uint8_t)(rx_shift_reg >> (i * 8)));
// s += s2;
//}
//Memo1->Lines->Add(s);
}
if (rx.stage == 1)
{ // looking for the 40-bit sync pattern, it follows the 24-bit pre-amble
const unsigned int sync_bit_ok_threshold = 32;
if (rx.bit_count >= sync_bit_ok_threshold)
{
// 40-bit sync pattern
uint64_t sync_nor = 0x07092a446fu; // normal
uint64_t sync_inv = 0xffffffffffu ^ sync_nor; // bit inverted
sync_nor ^= rx.shift_reg;
sync_inv ^= rx.shift_reg;
unsigned int nor_count = 0;
unsigned int inv_count = 0;
for (i = 40; i > 0; i--, sync_nor >>= 1, sync_inv >>= 1)
{
nor_count += sync_nor & 1u;
inv_count += sync_inv & 1u;
}
nor_count = 40 - nor_count;
inv_count = 40 - inv_count;
if (nor_count >= sync_bit_ok_threshold || inv_count >= sync_bit_ok_threshold)
{ // good enough
rx.inverted_sync = (inv_count > nor_count) ? true : false;
//String s;
//s.printf("%5u %2u %u sync found %s %u bits ",
// index,
// rx_bit_count,
// rx_packet_stage,
// rx_inverted_sync ? "inv" : "nor",
// rx_inverted_sync ? inv_count : nor_count);
//for (int i = 4; i >= 0; i--)
//{
// String s2;
// uint8_t b = rx_shift_reg >> (8 * i);
// if (rx_inverted_sync)
// b ^= 0xff;
// s2.printf(" %02X", b);
// s += s2;
//}
//Memo1->Lines->Add(s);
rx.data_index = 0;
rx.bit_count = 0;
rx.stage++;
}
}
continue;
rx.xor_bit = 1;
rx.stage = 1;
rx.bit_count = 1;
//s.printf("%5u %2u %u pre-amble found", index, rx_bit_count, rx_packet_stage);
//Memo1->Lines->Add(s);
}
if (rx.stage < 2)
{
//s.printf("%5u %3u %u ", index, rx_bit_count, rx_packet_stage);
//for (uint64_t mask = 1ull << ((sizeof(rx_shift_reg) * 8) - 1); mask != 0; mask >>= 1)
// s += (rx_shift_reg & mask) ? '#' : '.';
//s += " ";
//for (int i = sizeof(rx_shift_reg) - 1; i >= 0; i--)
}
// *********
if (rx.stage < 2)
continue;
if (rx.bit_count < 8)
continue;
rx.bit_count = 0;
// 55 55 55 55 55 55 55 07 09 2A 44 6F 94 9C 22 20 32 A4 1A 37 1E 3A 00 98 2C 84
rx.data[rx.data_index++] = rx.shift_reg & 0xff; // save the last 8 bits
if (rx.data_index < (FEC_K * 2))
continue;
// s.printf("%5u %3u %u %2u ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
// for (i = 0; i < rx_data_index; i++)
// {
// String s2;
// const uint8_t b = rx_buffer[i];
// s2.printf(" %02X", b);
// s += s2;
// }
// Memo1->Lines->Add(s);
if (!decode_data(rx.data))
{
MDC1200_reset_rx();
continue;
}
// extract the info from the packet
*op = rx.data[0];
*arg = rx.data[1];
*unit_id = ((uint16_t)rx.data[3] << 8) | (rx.data[2] << 0);
//s.printf("%5u %3u %u %2u decoded ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
//for (i = 0; i < 14; i++)
//{
// String s2;
// s2.printf(" %02X", (uint8_t)(rx_shift_reg >> (i * 8)));
// const uint8_t b = data[i];
// s2.printf(" %02X", b);
// s += s2;
//}
//Memo1->Lines->Add(s);
}
if (rx.stage == 1)
{ // looking for the 40-bit sync pattern, it follows the 24-bit pre-amble
const unsigned int sync_bit_ok_threshold = 32;
if (rx.bit_count >= sync_bit_ok_threshold)
{
// 40-bit sync pattern
uint64_t sync_nor = 0x07092a446fu; // normal
uint64_t sync_inv = 0xffffffffffu ^ sync_nor; // bit inverted
sync_nor ^= rx.shift_reg;
sync_inv ^= rx.shift_reg;
unsigned int nor_count = 0;
unsigned int inv_count = 0;
for (i = 40; i > 0; i--, sync_nor >>= 1, sync_inv >>= 1)
{
nor_count += sync_nor & 1u;
inv_count += sync_inv & 1u;
}
nor_count = 40 - nor_count;
inv_count = 40 - inv_count;
if (nor_count >= sync_bit_ok_threshold || inv_count >= sync_bit_ok_threshold)
{ // good enough
rx.inverted_sync = (inv_count > nor_count) ? true : false;
//String s;
//s.printf("%5u %2u %u sync found %s %u bits ",
// index,
// rx_bit_count,
// rx_packet_stage,
// rx_inverted_sync ? "inv" : "nor",
// rx_inverted_sync ? inv_count : nor_count);
//for (int i = 4; i >= 0; i--)
//{
// String s2;
// uint8_t b = rx_shift_reg >> (8 * i);
// if (rx_inverted_sync)
// b ^= 0xff;
// s2.printf(" %02X", b);
// s += s2;
//}
//Memo1->Lines->Add(s);
rx.data_index = 0;
rx.bit_count = 0;
rx.stage++;
}
}
continue;
}
// *********
if (rx.stage < 2)
continue;
if (rx.bit_count < 8)
continue;
rx.bit_count = 0;
// 55 55 55 55 55 55 55 07 09 2A 44 6F 94 9C 22 20 32 A4 1A 37 1E 3A 00 98 2C 84
rx.data[rx.data_index++] = rx.shift_reg & 0xff; // save the last 8 bits
if (rx.data_index < (FEC_K * 2))
continue;
// s.printf("%5u %3u %u %2u ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
// for (i = 0; i < rx_data_index; i++)
// {
// String s2;
// const uint8_t b = rx_buffer[i];
// s2.printf(" %02X", b);
// s += s2;
// }
// Memo1->Lines->Add(s);
if (!decode_data(rx.data))
{
// reset the detector
MDC1200_reset_rx();
continue;
return true;
}
// extract the info from the packet
*op = rx.data[0];
*arg = rx.data[1];
*unit_id = ((uint16_t)rx.data[3] << 8) | (rx.data[2] << 0);
//s.printf("%5u %3u %u %2u decoded ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
//for (i = 0; i < 14; i++)
//{
// String s2;
// const uint8_t b = data[i];
// s2.printf(" %02X", b);
// s += s2;
//}
//Memo1->Lines->Add(s);
// reset the detector
MDC1200_reset_rx();
return true;
}
return false;
}
@ -637,4 +673,10 @@ void test(void)
const int size = MDC1200_encode_single_packet(data, 0x12, 0x34, 0x5678);
// const int size = MDC1200_encode_double_packet(data, 0x55, 0x34, 0x5678, 0x0a, 0x0b, 0x0c, 0x0d);
}
*/
*/
void mdc1200_init(void)
{
memcpy(mdc1200_sync_suc_xor, mdc1200_sync, sizeof(mdc1200_sync));
xor_modulation(mdc1200_sync_suc_xor, sizeof(mdc1200_sync_suc_xor));
}

18
mdc1200.h
View File

@ -85,11 +85,23 @@ enum mdc1200_op_code_e {
MDC1200_OP_CODE_MSG_XX = 0x47,
MDC1200_OP_CODE_RADIO_CHECK = 0x63
};
typedef enum mdc1200_op_code_e mdc1200_op_code_t;
unsigned int MDC1200_encode_single_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id);
//unsigned int MDC1200_encode_double_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id, const uint8_t b0, const uint8_t b1, const uint8_t b2, const uint8_t b3);
extern const uint8_t mdc1200_sync[5];
extern uint8_t mdc1200_sync_suc_xor[sizeof(mdc1200_sync)];
unsigned int MDC1200_encode_single_packet(void *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id);
//unsigned int MDC1200_encode_double_packet(void *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id, const uint8_t b0, const uint8_t b1, const uint8_t b2, const uint8_t b3);
void MDC1200_reset_rx(void);
bool MDC1200_process_rx(const uint8_t rx_byte, uint8_t *op, uint8_t *arg, uint16_t *unit_id);
bool MDC1200_process_rx(
const void *buffer,
const unsigned int size,
//const bool inverted,
uint8_t *op,
uint8_t *arg,
uint16_t *unit_id);
void mdc1200_init(void);
#endif

4
settings.c
View File

@ -20,7 +20,9 @@
#include "app/fm.h"
#endif
#include "driver/eeprom.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "misc.h"
#include "settings.h"

4
ui/menu.c
View File

@ -26,7 +26,9 @@
#include "driver/bk4819.h"
#include "driver/eeprom.h" // EEPROM_ReadBuffer()
#include "driver/st7565.h"
#include "driver/uart.h"
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
#include "driver/uart.h"
#endif
#include "external/printf/printf.h"
#include "frequencies.h"
#include "helper/battery.h"

7
ui/status.c
View File

@ -99,11 +99,10 @@ void UI_DisplayStatus(const bool test_display)
else
#endif
// SCAN indicator
if (g_scan_state_dir != SCAN_STATE_DIR_OFF ||
g_screen_to_display == DISPLAY_SEARCH ||
test_display)
if (g_scan_state_dir != SCAN_STATE_DIR_OFF || test_display)
{
if (g_search_css_state == SEARCH_CSS_STATE_OFF) // don't display this if in search mode
// don't display this if in search mode
if (g_screen_to_display != DISPLAY_SEARCH)
{
if (g_scan_next_channel <= USER_CHANNEL_LAST)
{ // channel mode