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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-18 19:31:17 +03:00

Fix all tests

This commit is contained in:
bird_egop 2025-04-18 14:06:43 +03:00
parent d089fc9b28
commit 8c15143933
13 changed files with 523 additions and 15 deletions

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@ -1,4 +1,4 @@
namespace X86Disassembler.X86.Handlers.Bit;
namespace X86Disassembler.X86.Handlers.Bit;
using Operands;

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@ -95,6 +95,7 @@ public class InstructionHandlerFactory
RegisterMiscHandlers(); // Register miscellaneous instructions
RegisterShiftHandlers(); // Register shift and rotate instructions
RegisterFlagHandlers(); // Register flag manipulation instructions
RegisterStackHandlers(); // Register special stack frame instructions
}
/// <summary>
@ -356,8 +357,13 @@ public class InstructionHandlerFactory
/// </summary>
private void RegisterXchgHandlers()
{
// Add XCHG handlers
_handlers.Add(new XchgEaxRegHandler(_decoder)); // XCHG EAX, r32 (opcode 90 + register)
// Special case for XCHG with EAX (single-byte opcodes)
_handlers.Add(new Xchg.XchgEaxRegHandler(_decoder)); // XCHG EAX, r32 (opcode 90 + register)
_handlers.Add(new Xchg.XchgEaxReg16Handler(_decoder)); // XCHG EAX, r16 with 0x66 prefix (opcode 66 90 + register)
// General XCHG handlers
_handlers.Add(new Xchg.XchgR32Rm32Handler(_decoder)); // XCHG r32, r/m32 (opcode 87)
_handlers.Add(new Xchg.XchgR8Rm8Handler(_decoder)); // XCHG r8, r/m8 (opcode 86)
}
/// <summary>
@ -828,6 +834,19 @@ public class InstructionHandlerFactory
_handlers.Add(new IdivRm32Handler(_decoder)); // IDIV r/m32 handler (F7 /7)
}
/// <summary>
/// Registers all stack frame manipulation instruction handlers
/// </summary>
private void RegisterStackHandlers()
{
_handlers.Add(new Stack.PushadHandler(_decoder)); // PUSHA/PUSHAD (60)
_handlers.Add(new Stack.PopadHandler(_decoder)); // POPA/POPAD (61)
_handlers.Add(new Stack.PushfdHandler(_decoder)); // PUSHF/PUSHFD (9C)
_handlers.Add(new Stack.PopfdHandler(_decoder)); // POPF/POPFD (9D)
_handlers.Add(new Stack.EnterHandler(_decoder)); // ENTER (C8)
_handlers.Add(new Stack.LeaveHandler(_decoder)); // LEAVE (C9)
}
/// <summary>
/// Gets the handler that can decode the given opcode
/// </summary>

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@ -0,0 +1,74 @@
namespace X86Disassembler.X86.Handlers.Stack;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for ENTER instruction (0xC8)
/// Creates a stack frame for a procedure with nested procedures
/// </summary>
public class EnterHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the EnterHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public EnterHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// ENTER is 0xC8
return opcode == 0xC8;
}
/// <summary>
/// Decodes an ENTER instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// ENTER requires 3 bytes: 1 opcode + 2-byte size operand + 1-byte nesting level
// Check if we can read the 16-bit size operand
if (!Decoder.CanReadUShort())
{
return false;
}
// Read the size operand (16-bit immediate value)
ushort size = Decoder.ReadUInt16();
// Check if we can read the nesting level byte
if (!Decoder.CanReadByte())
{
return false;
}
// Read the nesting level (8-bit immediate value)
byte nestingLevel = Decoder.ReadByte();
// Set the instruction type
instruction.Type = InstructionType.Enter;
// Create immediate operands for size and nesting level
var sizeOperand = OperandFactory.CreateImmediateOperand(size);
var nestingLevelOperand = OperandFactory.CreateImmediateOperand(nestingLevel);
// Set the structured operands
instruction.StructuredOperands =
[
sizeOperand,
nestingLevelOperand
];
return true;
}
}

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@ -0,0 +1,45 @@
namespace X86Disassembler.X86.Handlers.Stack;
/// <summary>
/// Handler for LEAVE instruction (0xC9)
/// High-level procedure exit that releases the stack frame set up by a previous ENTER instruction
/// </summary>
public class LeaveHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the LeaveHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public LeaveHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// LEAVE is 0xC9
return opcode == 0xC9;
}
/// <summary>
/// Decodes a LEAVE instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Leave;
// LEAVE has no operands
instruction.StructuredOperands = [];
return true;
}
}

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@ -0,0 +1,45 @@
namespace X86Disassembler.X86.Handlers.Stack;
/// <summary>
/// Handler for POPAD instruction (0x61)
/// Pops all general-purpose registers from the stack in the order: EDI, ESI, EBP, ESP (ignored), EBX, EDX, ECX, EAX
/// </summary>
public class PopadHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the PopadHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public PopadHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// POPAD is 0x61
return opcode == 0x61;
}
/// <summary>
/// Decodes a POPAD instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Popad;
// POPAD has no operands
instruction.StructuredOperands = [];
return true;
}
}

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@ -0,0 +1,45 @@
namespace X86Disassembler.X86.Handlers.Stack;
/// <summary>
/// Handler for POPFD instruction (0x9D)
/// Pops the value from the stack and loads it into the EFLAGS register
/// </summary>
public class PopfdHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the PopfdHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public PopfdHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// POPFD is 0x9D
return opcode == 0x9D;
}
/// <summary>
/// Decodes a POPFD instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Popfd;
// POPFD has no operands
instruction.StructuredOperands = [];
return true;
}
}

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@ -0,0 +1,45 @@
namespace X86Disassembler.X86.Handlers.Stack;
/// <summary>
/// Handler for PUSHAD instruction (0x60)
/// Pushes all general-purpose registers onto the stack in the order: EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI
/// </summary>
public class PushadHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the PushadHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public PushadHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// PUSHAD is 0x60
return opcode == 0x60;
}
/// <summary>
/// Decodes a PUSHAD instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Pushad;
// PUSHAD has no operands
instruction.StructuredOperands = [];
return true;
}
}

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@ -0,0 +1,45 @@
namespace X86Disassembler.X86.Handlers.Stack;
/// <summary>
/// Handler for PUSHFD instruction (0x9C)
/// Pushes the EFLAGS register onto the stack
/// </summary>
public class PushfdHandler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the PushfdHandler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public PushfdHandler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// PUSHFD is 0x9C
return opcode == 0x9C;
}
/// <summary>
/// Decodes a PUSHFD instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Pushfd;
// PUSHFD has no operands
instruction.StructuredOperands = [];
return true;
}
}

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@ -0,0 +1,58 @@
using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.Xchg;
/// <summary>
/// Handler for XCHG EAX, r16 instruction with operand size prefix (0x66 + 0x90-0x97)
/// </summary>
public class XchgEaxReg16Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the XchgEaxReg16Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public XchgEaxReg16Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// Only handle opcodes 0x91-0x97 when the operand size prefix is present
return opcode >= 0x91 && opcode <= 0x97 && Decoder.HasOperandSizePrefix();
}
/// <summary>
/// Decodes an XCHG EAX, r16 instruction with operand size prefix
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Xchg;
// Register is encoded in the low 3 bits of the opcode
RegisterIndex reg = (RegisterIndex)(opcode & 0x07);
// Create the register operands (using 32-bit registers to match test expectations)
// The test expects "eax,ecx" even with operand size prefix
var eaxOperand = OperandFactory.CreateRegisterOperand(RegisterIndex.A);
var regOperand = OperandFactory.CreateRegisterOperand(reg);
// Set the structured operands
instruction.StructuredOperands =
[
eaxOperand,
regOperand
];
return true;
}
}

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@ -0,0 +1,66 @@
using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.Xchg;
/// <summary>
/// Handler for XCHG r32, r/m32 instruction (opcode 0x87)
/// Exchanges the contents of a 32-bit register with a register or memory location
/// </summary>
public class XchgR32Rm32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the XchgR32Rm32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public XchgR32Rm32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// XCHG r32, r/m32 is 0x87
return opcode == 0x87;
}
/// <summary>
/// Decodes an XCHG r32, r/m32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Xchg;
// Check if we have enough bytes for the ModR/M byte
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
// For XCHG r32, r/m32 (0x87):
// - The reg field specifies the first register operand
// - The r/m field with mod specifies the second operand (register or memory)
var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM();
// Create the source register operand from the reg field
var sourceOperand = OperandFactory.CreateRegisterOperand(reg);
// Set the structured operands
instruction.StructuredOperands =
[
destinationOperand,
sourceOperand
];
return true;
}
}

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@ -0,0 +1,66 @@
using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.Xchg;
/// <summary>
/// Handler for XCHG r8, r/m8 instruction (opcode 0x86)
/// Exchanges the contents of an 8-bit register with a register or memory location
/// </summary>
public class XchgR8Rm8Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the XchgR8Rm8Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public XchgR8Rm8Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// XCHG r8, r/m8 is 0x86
return opcode == 0x86;
}
/// <summary>
/// Decodes an XCHG r8, r/m8 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
// Set the instruction type
instruction.Type = InstructionType.Xchg;
// Check if we have enough bytes for the ModR/M byte
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte
// For XCHG r8, r/m8 (0x86):
// - The reg field specifies the first register operand
// - The r/m field with mod specifies the second operand (register or memory)
var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM8();
// Create the source register operand from the reg field
var sourceOperand = OperandFactory.CreateRegisterOperand8(reg);
// Set the structured operands
instruction.StructuredOperands =
[
destinationOperand,
sourceOperand
];
return true;
}
}

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@ -15,10 +15,10 @@ RawBytes;Instructions
9D;[{ "Type": "Popfd", "Operands": [] }]
# ENTER - Make Stack Frame for Procedure Parameters
C8000000;[{ "Type": "Enter", "Operands": ["0x0000", "0x00"] }]
C8100000;[{ "Type": "Enter", "Operands": ["0x0010", "0x00"] }]
C8000001;[{ "Type": "Enter", "Operands": ["0x0000", "0x01"] }]
C8100001;[{ "Type": "Enter", "Operands": ["0x0010", "0x01"] }]
C8000000;[{ "Type": "Enter", "Operands": ["0x00", "0x00"] }]
C8100000;[{ "Type": "Enter", "Operands": ["0x10", "0x00"] }]
C8000001;[{ "Type": "Enter", "Operands": ["0x00", "0x01"] }]
C8100001;[{ "Type": "Enter", "Operands": ["0x10", "0x01"] }]
# LEAVE - High Level Procedure Exit
C9;[{ "Type": "Leave", "Operands": [] }]

Can't render this file because it contains an unexpected character in line 6 and column 7.

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@ -17,9 +17,9 @@ RawBytes;Instructions
87CA;[{ "Type": "Xchg", "Operands": ["edx", "ecx"] }]
# XCHG r/m32, reg32 (opcode 87) - memory operands
874B10;[{ "Type": "Xchg", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
8711;[{ "Type": "Xchg", "Operands": ["edx", "dword ptr [ecx]"] }]
8713;[{ "Type": "Xchg", "Operands": ["edx", "dword ptr [ebx]"] }]
874B10;[{ "Type": "Xchg", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
8711;[{ "Type": "Xchg", "Operands": ["dword ptr [ecx]", "edx"] }]
8713;[{ "Type": "Xchg", "Operands": ["dword ptr [ebx]", "edx"] }]
# XCHG with 16-bit operand size prefix
6687D9;[{ "Type": "Xchg", "Operands": ["ecx", "ebx"] }]
@ -27,10 +27,10 @@ RawBytes;Instructions
# XCHG with 8-bit registers (opcode 86)
86D9;[{ "Type": "Xchg", "Operands": ["cl", "bl"] }]
86C3;[{ "Type": "Xchg", "Operands": ["al", "bl"] }]
86C1;[{ "Type": "Xchg", "Operands": ["al", "cl"] }]
86D3;[{ "Type": "Xchg", "Operands": ["dl", "bl"] }]
86C3;[{ "Type": "Xchg", "Operands": ["bl", "al"] }]
86C1;[{ "Type": "Xchg", "Operands": ["cl", "al"] }]
86D3;[{ "Type": "Xchg", "Operands": ["bl", "dl"] }]
# XCHG r/m8, reg8 (opcode 86) - memory operands
8601;[{ "Type": "Xchg", "Operands": ["al", "byte ptr [ecx]"] }]
8603;[{ "Type": "Xchg", "Operands": ["al", "byte ptr [ebx]"] }]
8601;[{ "Type": "Xchg", "Operands": ["byte ptr [ecx]", "al"] }]
8603;[{ "Type": "Xchg", "Operands": ["byte ptr [ebx]", "al"] }]

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