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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-19 03:41:18 +03:00

224 Commits

Author SHA1 Message Date
bird_egop
a9d4c39717 add misc handlers, cleanup and fixes 2025-04-17 20:47:51 +03:00
bird_egop
124493cd94 Fixes to tests and ModRM + SIB 2025-04-17 20:06:18 +03:00
bird_egop
7c0e6d7f3a Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions 2025-04-17 18:39:34 +03:00
bird_egop
dd97a00c2b Added 16-bit ADD handlers for r/m16, imm16 and r/m16, imm8 instructions 2025-04-17 01:43:45 +03:00
bird_egop
3fc0ebf1d5 Unified ADC accumulator handlers into a single handler 2025-04-17 01:34:08 +03:00
bird_egop
8c9b34ef09 Fixed PushImm16Handler registration order to correctly handle PUSH imm16 with operand size prefix 2025-04-16 21:46:08 +03:00
bird_egop
fa1a7f582c Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv 2025-04-16 21:44:02 +03:00
bird_egop
089fe4dfd4 Removed duplicate AndImmWithRm32Handler file 2025-04-16 21:27:23 +03:00
bird_egop
b210764caa Removed duplicate AND handler and added detailed opcode comments to XOR handlers. Fixed potential naming inconsistencies in handler registrations. 2025-04-16 21:25:46 +03:00
bird_egop
e8955b1ebd Improved code documentation in InstructionHandlerFactory. Added detailed opcode comments to handler registration lines and fixed duplicate handler registrations in RegisterAllHandlers method. 2025-04-16 21:24:09 +03:00
bird_egop
9096267f73 Added OrRm32R32Handler for OR r/m32, r32 (opcode 09) instruction and registered it in InstructionHandlerFactory. This fixes failing OR instruction tests. 2025-04-16 21:20:40 +03:00
bird_egop
eac8e9ea69 Fixed NOT instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax] and displacement addressing. 2025-04-16 21:17:48 +03:00
bird_egop
226ec25549 Fixed DIV and IDIV instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax], [ebp], and displacement addressing. 2025-04-16 21:16:31 +03:00
bird_egop
9da33e12c4 Fixed IMUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing. 2025-04-16 21:11:47 +03:00
bird_egop
800915b534 new handlers and test fixes 2025-04-16 20:54:08 +03:00
bird_egop
f654f64c71 Created dedicated Mul namespace for MUL instruction handlers. Implemented MulRm8Handler for MUL r/m8 instruction (opcode F6 /4) and moved MulRm32Handler to the new namespace. Updated InstructionHandlerFactory to register both handlers. 2025-04-16 20:43:06 +03:00
bird_egop
be2dfc3dc5 Fixed MUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] and direct memory addressing. 2025-04-16 20:40:18 +03:00
bird_egop
72ad1c0d90 Fixed NEG instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing. 2025-04-16 20:37:46 +03:00
bird_egop
d2279f4720 Added NegRm8Handler for NEG r/m8 instruction (opcode F6 /3). Registered the new handler in InstructionHandlerFactory. 2025-04-16 20:29:26 +03:00
bird_egop
f702e9da84 Fixed special case in MOV tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement. 2025-04-16 20:27:00 +03:00
bird_egop
41a4e5884d Fixed special case in INC/DEC tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement. 2025-04-16 20:18:14 +03:00
bird_egop
58b739d922 Fixed special case in LEA test with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test case with Mod=01 and zero displacement. 2025-04-16 20:16:31 +03:00
bird_egop
a474c4b7e4 Fixed invalid test cases in x86 disassembler tests. Added comments explaining special cases in x86 encoding and added valid test cases for LEA with different destination registers. 2025-04-16 20:13:07 +03:00
bird_egop
09786b781b Added detailed comments to test files explaining x86 encoding special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement, 3) SIB byte with EBP as base register special cases 2025-04-16 19:58:34 +03:00
bird_egop
e5b63270b6 Added detailed comments explaining x86 ModR/M special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement 2025-04-16 19:54:15 +03:00
bird_egop
154e811d2d Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4) 2025-04-16 19:50:00 +03:00
bird_egop
bc6d32a725 Fixed JP and JNP instruction types in TwoByteConditionalJumpHandler 2025-04-16 19:44:37 +03:00
bird_egop
db96af74ff Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types 2025-04-16 19:43:03 +03:00
bird_egop
193f9cd2d8 refactor modrm decoder more 2025-04-16 19:14:11 +03:00
bird_egop
a91d6af8fc Refactored ModRMDecoder class into smaller, more focused components. Created RegisterMapper and SIBDecoder classes to improve maintainability. 2025-04-16 19:11:36 +03:00
bird_egop
9445fb225f fixes and removed unused code 2025-04-16 19:07:32 +03:00
bird_egop
9ddaa02471 Fixed ModRM handling for 8-bit operands with SIB byte. Updated test to match implementation. 2025-04-16 18:42:15 +03:00
bird_egop
deb98183b1 more fixes 2025-04-16 18:32:41 +03:00
bird_egop
6719cff2af Test fixes 2025-04-16 18:30:17 +03:00
bird_egop
d4eb920e2f Updated instruction handlers to use factory methods instead of directly setting Size property 2025-04-16 01:39:23 +03:00
bird_egop
e06ea2beb3 Refactored register operands to separate 8-bit registers into dedicated Register8Operand class 2025-04-16 01:10:33 +03:00
bird_egop
46592d4877 fix various tests 2025-04-15 23:54:51 +03:00
bird_egop
4327464b98 add new add handlers 2025-04-15 23:54:37 +03:00
bird_egop
0dac4481f6 fix segment override tests according to ghidra 2025-04-15 23:22:14 +03:00
bird_egop
6882f0bd86 Update TestDataProvider to use CSV files directly from filesystem instead of embedded resources 2025-04-15 23:21:52 +03:00
bird_egop
61e92a50a5 Split FPU tests by instruction type for better organization and readability 2025-04-15 22:45:46 +03:00
bird_egop
0a2d551cb4 Enhanced test coverage for floating-point instructions 2025-04-15 22:40:09 +03:00
bird_egop
904f0eed47 Enhanced test coverage for DIV, flag control, and FNSTSW instructions 2025-04-15 22:35:14 +03:00
bird_egop
6169d68967 Enhanced test coverage for CMP, BIT and CALL instructions 2025-04-15 22:32:37 +03:00
bird_egop
d6903f2e5b Enhanced test coverage for AND instructions 2025-04-15 22:28:54 +03:00
bird_egop
2fde1f2ae3 Enhanced test coverage for ADC and ADD instructions 2025-04-15 22:27:51 +03:00
bird_egop
2123ed2c5d add tons of tests 2025-04-15 22:20:46 +03:00
bird_egop
abe4d38d4b more cleanup 2025-04-15 02:42:47 +03:00
bird_egop
49f1d7d221 cleanup 2025-04-15 02:32:14 +03:00
bird_egop
3ea327064a Fix x86 disassembler issues with direct memory addressing and immediate value formatting 2025-04-15 02:29:32 +03:00