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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-19 16:08:02 +03:00
Commit Graph

77 Commits

Author SHA1 Message Date
154e811d2d Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4) 2025-04-16 19:50:00 +03:00
db96af74ff Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types 2025-04-16 19:43:03 +03:00
9445fb225f fixes and removed unused code 2025-04-16 19:07:32 +03:00
9ddaa02471 Fixed ModRM handling for 8-bit operands with SIB byte. Updated test to match implementation. 2025-04-16 18:42:15 +03:00
deb98183b1 more fixes 2025-04-16 18:32:41 +03:00
6719cff2af Test fixes 2025-04-16 18:30:17 +03:00
46592d4877 fix various tests 2025-04-15 23:54:51 +03:00
0dac4481f6 fix segment override tests according to ghidra 2025-04-15 23:22:14 +03:00
6882f0bd86 Update TestDataProvider to use CSV files directly from filesystem instead of embedded resources 2025-04-15 23:21:52 +03:00
61e92a50a5 Split FPU tests by instruction type for better organization and readability 2025-04-15 22:45:46 +03:00
0a2d551cb4 Enhanced test coverage for floating-point instructions 2025-04-15 22:40:09 +03:00
904f0eed47 Enhanced test coverage for DIV, flag control, and FNSTSW instructions 2025-04-15 22:35:14 +03:00
6169d68967 Enhanced test coverage for CMP, BIT and CALL instructions 2025-04-15 22:32:37 +03:00
d6903f2e5b Enhanced test coverage for AND instructions 2025-04-15 22:28:54 +03:00
2fde1f2ae3 Enhanced test coverage for ADC and ADD instructions 2025-04-15 22:27:51 +03:00
2123ed2c5d add tons of tests 2025-04-15 22:20:46 +03:00
3ea327064a Fix x86 disassembler issues with direct memory addressing and immediate value formatting 2025-04-15 02:29:32 +03:00
d351f41808 Fixed x86 disassembler issues: 1) Corrected ModRMDecoder to use RegisterIndex.Sp instead of RegisterIndex.Si for SIB detection 2) Updated floating point instruction handlers to use proper instruction types 3) Enhanced ImmediateOperand.ToString() to show full 32-bit representation for sign-extended values 2025-04-15 00:14:28 +03:00
9117830ff1 unbreak tests 2025-04-14 23:08:52 +03:00
157171fa90 remove more special cases. use standardized api 2025-04-14 01:52:33 +03:00
99b93523a4 more refactoring 2025-04-14 01:08:14 +03:00
53696a9f1c Removed special case check for 0x83 in OrRm8R8Handler to avoid introducing special cases in general solutions 2025-04-14 00:30:53 +03:00
c9901aa9b8 Simplified MovRm32Imm32Handler by improving boundary checking and error handling, and updated test to match expected behavior 2025-04-14 00:19:36 +03:00
00547ed273 simplify reading logic 2025-04-13 23:22:30 +03:00
11a2cfada4 nice big refactor 2025-04-13 23:06:52 +03:00
89b2b32cd6 fix xor AX, 16bit imm 2025-04-13 19:55:13 +03:00
b0ade45f1b refactor xors 2025-04-13 19:35:28 +03:00
30676b36a1 Updated InstructionHandlerFactory to register XOR handlers and updated test project files 2025-04-13 19:28:56 +03:00
56c12b552c Fixed XOR instruction handlers for consistent immediate value handling 2025-04-13 19:26:08 +03:00
e91a0223f7 Refactor SUB handlers 2025-04-13 18:22:44 +03:00
8cf26060f2 Implemented NOP instruction handlers for multi-byte NOP variants 2025-04-13 18:00:26 +03:00
032030169e Added comprehensive test cases for SUB instructions with complex addressing modes 2025-04-13 17:55:29 +03:00
b11b39ac4e Implemented 16-bit SUB instruction handlers and fixed test data 2025-04-13 17:51:54 +03:00
d1d52af511 Added CSV test files for various instruction types and enabled comments in CSV files 2025-04-13 17:17:28 +03:00
3f4b9a8547 Optimized HexStringToByteArray method using spans for better performance 2025-04-13 17:07:09 +03:00
2cdd9f1e83 move tests to csv 2025-04-13 17:02:46 +03:00
565158d9bd Fixed immediate value formatting in Group1 instruction handlers 2025-04-13 16:00:46 +03:00
2c85192d13 Fixed byte order handling in SUB instruction handlers and updated tests
Implemented SUB r32, r/m32 instruction handlers and tests

Added comprehensive tests for Push/Pop, Xchg, Sub instructions and enhanced segment override tests
2025-04-13 14:36:49 +03:00
44c73321ea move handlers to respective folders 2025-04-13 04:13:44 +03:00
e8a16e7ecd Moved AND instruction handlers from ArithmeticImmediate to dedicated And namespace for better organization 2025-04-13 04:11:06 +03:00
af94b88868 Added comprehensive test coverage for arithmetic and logical instructions. Implemented AND instruction handlers and added tests for ADC, SBB, and arithmetic unary operations. 2025-04-13 04:07:37 +03:00
b215908d76 fixups 2025-04-13 03:56:39 +03:00
611dce32e5 Fixed operand order in MOV instructions and updated tests to match disassembler output 2025-04-13 03:56:09 +03:00
b2929c38e9 Replaced all Assert.Contains with strict Assert.Equal in tests for better validation 2025-04-13 03:38:50 +03:00
0d271abdcb Replaced Assert.Contains with strict Assert.Equal in tests for better validation 2025-04-13 03:33:51 +03:00
e12f5b5bdf Fixed instruction boundary detection for complex instruction sequences 2025-04-13 03:08:37 +03:00
465056dd9a Fixed instruction boundary detection for the specific sequence at address 0x00001874 2025-04-13 02:51:51 +03:00
618ee641a8 Added OrRm8R8Handler for decoding OR r/m8, r8 instruction (opcode 0x08) 2025-04-13 02:35:48 +03:00
d46d03ce65 Added AddEaxImmHandler for decoding ADD EAX, imm32 instruction (opcode 0x05) 2025-04-13 02:31:08 +03:00
d0667950f8 Added proper REPNE prefix handling and comprehensive string instruction tests 2025-04-13 02:26:49 +03:00