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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-19 03:41:18 +03:00

73 Commits

Author SHA1 Message Date
bird_egop
cfef24f72d tests and handler fixes 2025-04-18 12:49:43 +03:00
bird_egop
e9c221ac14 Added flag manipulation instruction handlers (STC, CLC, CMC, STD, CLD, STI, CLI, SAHF, LAHF) 2025-04-18 12:30:47 +03:00
bird_egop
18ecf31c46 Refactored floating point p-handlers with consistent naming convention 2025-04-18 02:31:06 +03:00
bird_egop
2a8cf9534e Fixed floating point comparison handlers for FCOM ST(i) and FCOMP ST(i) instructions 2025-04-18 01:25:34 +03:00
bird_egop
84d5652a62 remove duplicate registration 2025-04-18 01:02:14 +03:00
bird_egop
66f9e838ad Fixed floating point handlers for qword operands and added missing FCOM ST(0), ST(i) handler 2025-04-18 00:44:57 +03:00
bird_egop
d216c29315 Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes. 2025-04-18 00:22:02 +03:00
bird_egop
ec56576116 Refactored floating point handlers into specialized classes for better organization and maintainability 2025-04-17 23:57:16 +03:00
bird_egop
5916d13995 Reorganize floating point handlers into logical subfolders 2025-04-17 23:48:09 +03:00
bird_egop
963248dca0 Refactor floating point handlers to use ReadModRMFpu method 2025-04-17 23:33:56 +03:00
bird_egop
4d2db05a07 Implemented additional SBB instruction handlers for register-register and register-memory operations 2025-04-17 22:04:12 +03:00
bird_egop
33dc0b0fa2 Implemented SBB instruction handlers for the x86 disassembler 2025-04-17 21:49:44 +03:00
bird_egop
a62812f71c implement shift and rotate handlers. Fix tests 2025-04-17 21:35:49 +03:00
bird_egop
a9d4c39717 add misc handlers, cleanup and fixes 2025-04-17 20:47:51 +03:00
bird_egop
124493cd94 Fixes to tests and ModRM + SIB 2025-04-17 20:06:18 +03:00
bird_egop
7c0e6d7f3a Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions 2025-04-17 18:39:34 +03:00
bird_egop
dd97a00c2b Added 16-bit ADD handlers for r/m16, imm16 and r/m16, imm8 instructions 2025-04-17 01:43:45 +03:00
bird_egop
3fc0ebf1d5 Unified ADC accumulator handlers into a single handler 2025-04-17 01:34:08 +03:00
bird_egop
8c9b34ef09 Fixed PushImm16Handler registration order to correctly handle PUSH imm16 with operand size prefix 2025-04-16 21:46:08 +03:00
bird_egop
fa1a7f582c Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv 2025-04-16 21:44:02 +03:00
bird_egop
b210764caa Removed duplicate AND handler and added detailed opcode comments to XOR handlers. Fixed potential naming inconsistencies in handler registrations. 2025-04-16 21:25:46 +03:00
bird_egop
e8955b1ebd Improved code documentation in InstructionHandlerFactory. Added detailed opcode comments to handler registration lines and fixed duplicate handler registrations in RegisterAllHandlers method. 2025-04-16 21:24:09 +03:00
bird_egop
9096267f73 Added OrRm32R32Handler for OR r/m32, r32 (opcode 09) instruction and registered it in InstructionHandlerFactory. This fixes failing OR instruction tests. 2025-04-16 21:20:40 +03:00
bird_egop
800915b534 new handlers and test fixes 2025-04-16 20:54:08 +03:00
bird_egop
f654f64c71 Created dedicated Mul namespace for MUL instruction handlers. Implemented MulRm8Handler for MUL r/m8 instruction (opcode F6 /4) and moved MulRm32Handler to the new namespace. Updated InstructionHandlerFactory to register both handlers. 2025-04-16 20:43:06 +03:00
bird_egop
d2279f4720 Added NegRm8Handler for NEG r/m8 instruction (opcode F6 /3). Registered the new handler in InstructionHandlerFactory. 2025-04-16 20:29:26 +03:00
bird_egop
154e811d2d Added JmpRm32Handler for JMP r/m32 instructions (opcode FF /4) 2025-04-16 19:50:00 +03:00
bird_egop
db96af74ff Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types 2025-04-16 19:43:03 +03:00
bird_egop
4327464b98 add new add handlers 2025-04-15 23:54:37 +03:00
bird_egop
685eeda03d Updated instruction handlers to use Type and StructuredOperands instead of Mnemonic and Operands 2025-04-14 22:09:05 +03:00
bird_egop
ec70b31058 Simplified CmpImmWithRm32Handler and added AndImmWithRm32Handler 2025-04-13 23:39:57 +03:00
bird_egop
59df064ca4 broken tests 2025-04-13 20:20:51 +03:00
bird_egop
89b2b32cd6 fix xor AX, 16bit imm 2025-04-13 19:55:13 +03:00
bird_egop
30676b36a1 Updated InstructionHandlerFactory to register XOR handlers and updated test project files 2025-04-13 19:28:56 +03:00
bird_egop
8cf26060f2 Implemented NOP instruction handlers for multi-byte NOP variants 2025-04-13 18:00:26 +03:00
bird_egop
b11b39ac4e Implemented 16-bit SUB instruction handlers and fixed test data 2025-04-13 17:51:54 +03:00
bird_egop
565158d9bd Fixed immediate value formatting in Group1 instruction handlers 2025-04-13 16:00:46 +03:00
bird_egop
2c85192d13 Fixed byte order handling in SUB instruction handlers and updated tests
Implemented SUB r32, r/m32 instruction handlers and tests

Added comprehensive tests for Push/Pop, Xchg, Sub instructions and enhanced segment override tests
2025-04-13 14:36:49 +03:00
bird_egop
44c73321ea move handlers to respective folders 2025-04-13 04:13:44 +03:00
bird_egop
e8a16e7ecd Moved AND instruction handlers from ArithmeticImmediate to dedicated And namespace for better organization 2025-04-13 04:11:06 +03:00
bird_egop
af94b88868 Added comprehensive test coverage for arithmetic and logical instructions. Implemented AND instruction handlers and added tests for ADC, SBB, and arithmetic unary operations. 2025-04-13 04:07:37 +03:00
bird_egop
17ef78a7a7 Fixed instruction boundary detection and added JGE instruction handler 2025-04-13 03:19:42 +03:00
bird_egop
465056dd9a Fixed instruction boundary detection for the specific sequence at address 0x00001874 2025-04-13 02:51:51 +03:00
bird_egop
618ee641a8 Added OrRm8R8Handler for decoding OR r/m8, r8 instruction (opcode 0x08) 2025-04-13 02:35:48 +03:00
bird_egop
d46d03ce65 Added AddEaxImmHandler for decoding ADD EAX, imm32 instruction (opcode 0x05) 2025-04-13 02:31:08 +03:00
bird_egop
79bf419c07 Consolidated string instruction handling by enhancing StringInstructionHandler to handle both regular and REP/REPNE prefixed instructions 2025-04-13 02:23:27 +03:00
bird_egop
410211fcc6 Converted StringInstructionDecoder to StringInstructionHandler for better consistency with handler pattern 2025-04-13 02:18:12 +03:00
bird_egop
9dfa559045 Refactored instruction decoder to improve modularity. Created StringInstructionDecoder and updated PrefixDecoder. Fixed handler registration in InstructionHandlerFactory. 2025-04-13 02:16:12 +03:00
bird_egop
52841237c1 Added CmpRm32R32Handler for CMP r/m32, r32 instruction (0x39) with tests 2025-04-13 01:34:56 +03:00
bird_egop
c701fdb435 Added CmpAlImmHandler for CMP AL, imm8 instruction (0x3C) with tests 2025-04-13 01:30:42 +03:00